Lines Matching defs:mh

62 	pCmd = (_type *)&mh->mh_cmdbuf[0];				\
69 malo_hal_read4(struct malo_hal *mh, bus_size_t off)
71 return bus_space_read_4(mh->mh_iot, mh->mh_ioh, off);
75 malo_hal_write4(struct malo_hal *mh, bus_size_t off, uint32_t val)
77 bus_space_write_4(mh->mh_iot, mh->mh_ioh, off, val);
102 struct malo_hal *mh;
104 mh = malloc(sizeof(struct malo_hal), M_DEVBUF, M_NOWAIT | M_ZERO);
105 if (mh == NULL)
108 mh->mh_dev = dev;
109 mh->mh_ioh = ioh;
110 mh->mh_iot = iot;
112 snprintf(mh->mh_mtxname, sizeof(mh->mh_mtxname),
114 mtx_init(&mh->mh_mtx, mh->mh_mtxname, NULL, MTX_DEF);
132 &mh->mh_dmat);
140 error = bus_dmamem_alloc(mh->mh_dmat, (void**) &mh->mh_cmdbuf,
142 &mh->mh_dmamap);
149 error = bus_dmamap_load(mh->mh_dmat, mh->mh_dmamap,
150 mh->mh_cmdbuf, MALO_CMDBUF_SIZE,
151 malo_hal_load_cb, &mh->mh_cmdaddr,
159 return (mh);
162 if (mh->mh_cmdbuf != NULL)
163 bus_dmamem_free(mh->mh_dmat, mh->mh_cmdbuf,
164 mh->mh_dmamap);
165 if (mh->mh_dmat)
166 bus_dma_tag_destroy(mh->mh_dmat);
167 free(mh, M_DEVBUF);
177 malo_hal_send_cmd(struct malo_hal *mh)
181 bus_dmamap_sync(mh->mh_dmat, mh->mh_dmamap,
184 malo_hal_write4(mh, MALO_REG_GEN_PTR, mh->mh_cmdaddr);
185 dummy = malo_hal_read4(mh, MALO_REG_INT_CODE);
187 malo_hal_write4(mh, MALO_REG_H2A_INTERRUPT_EVENTS,
192 malo_hal_waitforcmd(struct malo_hal *mh, uint16_t cmd)
198 if (mh->mh_cmdbuf[0] == le16toh(cmd))
209 malo_hal_execute_cmd(struct malo_hal *mh, unsigned short cmd)
211 MALO_HAL_LOCK_ASSERT(mh);
213 if ((mh->mh_flags & MHF_FWHANG) &&
214 (mh->mh_debug & MALO_HAL_DEBUG_IGNHANG) == 0) {
215 device_printf(mh->mh_dev, "firmware hung, skipping cmd 0x%x\n",
220 if (malo_hal_read4(mh, MALO_REG_INT_CODE) == 0xffffffff) {
221 device_printf(mh->mh_dev, "%s: device not present!\n",
226 malo_hal_send_cmd(mh);
227 if (!malo_hal_waitforcmd(mh, cmd | 0x8000)) {
228 device_printf(mh->mh_dev,
230 mh->mh_flags |= MHF_FWHANG;
234 bus_dmamap_sync(mh->mh_dmat, mh->mh_dmamap,
241 malo_hal_get_cal_table(struct malo_hal *mh, uint8_t annex, uint8_t index)
246 MALO_HAL_LOCK_ASSERT(mh);
252 ret = malo_hal_execute_cmd(mh, MALO_HOSTCMD_GET_CALTABLE);
259 malo_hal_get_pwrcal_table(struct malo_hal *mh, struct malo_hal_caldata *cal)
264 MALO_HAL_LOCK(mh);
266 data = ((const struct malo_cmd_caltable *) mh->mh_cmdbuf)->caltbl;
267 if (malo_hal_get_cal_table(mh, 33, 0) == 0) {
272 mh->mh_flags |= MHF_CALDATA;
273 MALO_HAL_UNLOCK(mh);
282 malo_hal_resetstate(struct malo_hal *mh)
288 if ((mh->mh_flags & MHF_CALDATA) == 0)
289 malo_hal_get_pwrcal_table(mh, &mh->mh_caldata);
294 malo_hal_fw_reset(struct malo_hal *mh)
297 if (malo_hal_read4(mh, MALO_REG_INT_CODE) == 0xffffffff) {
298 device_printf(mh->mh_dev, "%s: device not present!\n",
303 malo_hal_write4(mh, MALO_REG_H2A_INTERRUPT_EVENTS, MALO_ISR_RESET);
304 mh->mh_flags &= ~MHF_FWHANG;
308 malo_hal_trigger_pcicmd(struct malo_hal *mh)
312 bus_dmamap_sync(mh->mh_dmat, mh->mh_dmamap, BUS_DMASYNC_PREWRITE);
314 malo_hal_write4(mh, MALO_REG_GEN_PTR, mh->mh_cmdaddr);
315 dummy = malo_hal_read4(mh, MALO_REG_INT_CODE);
317 malo_hal_write4(mh, MALO_REG_INT_CODE, 0x00);
318 dummy = malo_hal_read4(mh, MALO_REG_INT_CODE);
320 malo_hal_write4(mh, MALO_REG_H2A_INTERRUPT_EVENTS,
322 dummy = malo_hal_read4(mh, MALO_REG_INT_CODE);
326 malo_hal_waitfor(struct malo_hal *mh, uint32_t val)
332 if (malo_hal_read4(mh, MALO_REG_INT_CODE) == val)
343 malo_hal_send_helper(struct malo_hal *mh, int bsize,
346 mh->mh_cmdbuf[0] = htole16(MALO_HOSTCMD_CODE_DNLD);
347 mh->mh_cmdbuf[1] = htole16(bsize);
348 memcpy(&mh->mh_cmdbuf[4], data , dsize);
350 malo_hal_trigger_pcicmd(mh);
356 if (malo_hal_waitfor(mh, MALO_INT_CODE_CMD_FINISHED) != 0) {
357 device_printf(mh->mh_dev,
359 __func__, malo_hal_read4(mh, MALO_REG_INT_CODE));
365 malo_hal_write4(mh, MALO_REG_INT_CODE, 0);
371 malo_hal_fwload_helper(struct malo_hal *mh, char *helper)
378 device_printf(mh->mh_dev, "could not read microcode %s!\n",
383 device_printf(mh->mh_dev, "load %s firmware image (%zu bytes)\n",
386 error = malo_hal_send_helper(mh, fw->datasize, fw->data, fw->datasize,
392 error = malo_hal_send_helper(mh, 0, NULL, 0, MALO_NOWAIT);
404 malo_hal_send_main(struct malo_hal *mh, const void *data, size_t dsize,
407 mh->mh_cmdbuf[0] = htole16(MALO_HOSTCMD_CODE_DNLD);
408 mh->mh_cmdbuf[1] = htole16(dsize);
409 mh->mh_cmdbuf[2] = htole16(seqnum);
410 mh->mh_cmdbuf[3] = 0;
411 memcpy(&mh->mh_cmdbuf[4], data, dsize);
413 malo_hal_trigger_pcicmd(mh);
418 if (malo_hal_waitfor(mh, MALO_INT_CODE_CMD_FINISHED) != 0) {
419 device_printf(mh->mh_dev,
421 __func__, malo_hal_read4(mh, MALO_REG_INT_CODE));
427 malo_hal_write4(mh, MALO_REG_INT_CODE, 0);
433 malo_hal_fwload_main(struct malo_hal *mh, char *firmware)
446 device_printf(mh->mh_dev, "could not read firmware %s!\n",
451 device_printf(mh->mh_dev, "load %s firmware image (%zu bytes)\n",
459 error = malo_hal_send_main(mh, fp, blocksize, seqnum++,
470 error = malo_hal_send_main(mh, NULL, 0, seqnum++, MALO_NOWAIT);
480 malo_hal_fwload(struct malo_hal *mh, char *helper, char *firmware)
492 malo_hal_fw_reset(mh);
494 malo_hal_write4(mh, MALO_REG_A2H_INTERRUPT_CLEAR_SEL,
496 malo_hal_write4(mh, MALO_REG_A2H_INTERRUPT_CAUSE, 0x00);
497 malo_hal_write4(mh, MALO_REG_A2H_INTERRUPT_MASK, 0x00);
498 malo_hal_write4(mh, MALO_REG_A2H_INTERRUPT_STATUS_MASK,
501 error = malo_hal_fwload_helper(mh, helper);
503 device_printf(mh->mh_dev, "failed to load bootrom loader.\n");
509 error = malo_hal_fwload_main(mh, firmware);
511 device_printf(mh->mh_dev, "failed to load firmware.\n");
519 mh->mh_cmdbuf[1] = 0;
522 malo_hal_trigger_pcicmd(mh);
525 malo_hal_write4(mh, MALO_REG_GEN_PTR, opmode);
527 if (malo_hal_read4(mh, MALO_REG_INT_CODE) == fwreadysig) {
528 malo_hal_write4(mh, MALO_REG_INT_CODE, 0x00);
529 return malo_hal_resetstate(mh);
535 malo_hal_fw_reset(mh);
545 malo_hal_gethwspecs(struct malo_hal *mh, struct malo_hal_hwspec *hw)
550 MALO_HAL_LOCK(mh);
554 cmd->ul_fw_awakecookie = htole32((unsigned int)mh->mh_cmdaddr + 2048);
556 ret = malo_hal_execute_cmd(mh, MALO_HOSTCMD_GET_HW_SPEC);
574 MALO_HAL_UNLOCK(mh);
580 malo_hal_detach(struct malo_hal *mh)
583 bus_dmamem_free(mh->mh_dmat, mh->mh_cmdbuf, mh->mh_dmamap);
584 bus_dma_tag_destroy(mh->mh_dmat);
585 mtx_destroy(&mh->mh_mtx);
586 free(mh, M_DEVBUF);
596 malo_hal_setantenna(struct malo_hal *mh, enum malo_hal_antenna dirset, int ant)
604 MALO_HAL_LOCK(mh);
615 ret = malo_hal_execute_cmd(mh, MALO_HOSTCMD_802_11_RF_ANTENNA);
617 MALO_HAL_UNLOCK(mh);
628 malo_hal_setradio(struct malo_hal *mh, int onoff,
634 MALO_HAL_LOCK(mh);
645 ret = malo_hal_execute_cmd(mh, MALO_HOSTCMD_802_11_RADIO_CONTROL);
647 MALO_HAL_UNLOCK(mh);
656 malo_hal_intrset(struct malo_hal *mh, uint32_t mask)
659 malo_hal_write4(mh, MALO_REG_A2H_INTERRUPT_MASK, 0);
660 (void)malo_hal_read4(mh, MALO_REG_INT_CODE);
662 mh->mh_imask = mask;
663 malo_hal_write4(mh, MALO_REG_A2H_INTERRUPT_MASK, mask);
664 (void)malo_hal_read4(mh, MALO_REG_INT_CODE);
668 malo_hal_setchannel(struct malo_hal *mh, const struct malo_hal_channel *chan)
673 MALO_HAL_LOCK(mh);
680 ret = malo_hal_execute_cmd(mh, MALO_HOSTCMD_SET_RF_CHANNEL);
682 MALO_HAL_UNLOCK(mh);
688 malo_hal_settxpower(struct malo_hal *mh, const struct malo_hal_channel *c)
691 const struct malo_hal_caldata *cal = &mh->mh_caldata;
696 MALO_HAL_LOCK(mh);
706 ret = malo_hal_execute_cmd(mh, MALO_HOSTCMD_802_11_RF_TX_POWER);
708 MALO_HAL_UNLOCK(mh);
714 malo_hal_setpromisc(struct malo_hal *mh, int enable)
721 malo_hal_setassocid(struct malo_hal *mh,
727 MALO_HAL_LOCK(mh);
735 ret = malo_hal_execute_cmd(mh, MALO_HOSTCMD_SET_AID);
736 MALO_HAL_UNLOCK(mh);
746 malo_hal_txstart(struct malo_hal *mh, int qnum)
748 bus_space_write_4(mh->mh_iot, mh->mh_ioh,
750 (void) bus_space_read_4(mh->mh_iot, mh->mh_ioh, MALO_REG_INT_CODE);
757 malo_hal_getisr(struct malo_hal *mh, uint32_t *status)
761 cause = bus_space_read_4(mh->mh_iot, mh->mh_ioh,
767 bus_space_write_4(mh->mh_iot, mh->mh_ioh,
768 MALO_REG_A2H_INTERRUPT_CAUSE, cause &~ mh->mh_imask);
769 (void) bus_space_read_4(mh->mh_iot, mh->mh_ioh,
771 cause &= mh->mh_imask;
782 malo_hal_cmddone(struct malo_hal *mh)
788 malo_hal_prescan(struct malo_hal *mh)
793 MALO_HAL_LOCK(mh);
798 ret = malo_hal_execute_cmd(mh, MALO_HOSTCMD_SET_PRE_SCAN);
800 MALO_HAL_UNLOCK(mh);
806 malo_hal_postscan(struct malo_hal *mh, uint8_t *macaddr, uint8_t ibsson)
811 MALO_HAL_LOCK(mh);
818 ret = malo_hal_execute_cmd(mh, MALO_HOSTCMD_SET_POST_SCAN);
820 MALO_HAL_UNLOCK(mh);
826 malo_hal_set_slot(struct malo_hal *mh, int is_short)
831 MALO_HAL_LOCK(mh);
837 ret = malo_hal_execute_cmd(mh, MALO_HOSTCMD_SET_SLOT);
839 MALO_HAL_UNLOCK(mh);
845 malo_hal_set_rate(struct malo_hal *mh, uint16_t curmode, uint8_t rate)
850 MALO_HAL_LOCK(mh);
880 ret = malo_hal_execute_cmd(mh, MALO_HOSTCMD_SET_RATE);
882 MALO_HAL_UNLOCK(mh);
888 malo_hal_setmcast(struct malo_hal *mh, int nmc, const uint8_t macs[])
896 MALO_HAL_LOCK(mh);
903 ret = malo_hal_execute_cmd(mh, MALO_HOSTCMD_MAC_MULTICAST_ADR);
905 MALO_HAL_UNLOCK(mh);