dev/ixgbe/ixgbe_phy.c

46 static void ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl);
47 static void ixgbe_lower_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl);
48 static s32 ixgbe_set_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl, bool data);
49 static bool ixgbe_get_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl);
2279 	u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
2283 	i2cctl |= IXGBE_I2C_BB_EN_BY_MAC(hw);
2286 	ixgbe_set_i2c_data(hw, &i2cctl, 1);
2287 	ixgbe_raise_i2c_clk(hw, &i2cctl);
2292 	ixgbe_set_i2c_data(hw, &i2cctl, 0);
2297 	ixgbe_lower_i2c_clk(hw, &i2cctl);
2314 	u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
2322 	ixgbe_set_i2c_data(hw, &i2cctl, 0);
2323 	ixgbe_raise_i2c_clk(hw, &i2cctl);
2328 	ixgbe_set_i2c_data(hw, &i2cctl, 1);
2334 		i2cctl &= ~bb_en_bit;
2335 		i2cctl |= data_oe_bit | clk_oe_bit;
2336 		IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), i2cctl);
2375 	u32 i2cctl;
2389 	i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
2390 	i2cctl |= IXGBE_I2C_DATA_OUT_BY_MAC(hw);
2391 	i2cctl |= IXGBE_I2C_DATA_OE_N_EN_BY_MAC(hw);
2392 	IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), i2cctl);
2409 	u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
2416 		i2cctl |= IXGBE_I2C_DATA_OUT_BY_MAC(hw);
2417 		i2cctl |= data_oe_bit;
2418 		IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), i2cctl);
2421 	ixgbe_raise_i2c_clk(hw, &i2cctl);
2429 		i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
2430 		ack = ixgbe_get_i2c_data(hw, &i2cctl);
2442 	ixgbe_lower_i2c_clk(hw, &i2cctl);
2459 	u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
2465 		i2cctl |= IXGBE_I2C_DATA_OUT_BY_MAC(hw);
2466 		i2cctl |= data_oe_bit;
2467 		IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), i2cctl);
2470 	ixgbe_raise_i2c_clk(hw, &i2cctl);
2475 	i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
2476 	*data = ixgbe_get_i2c_data(hw, &i2cctl);
2478 	ixgbe_lower_i2c_clk(hw, &i2cctl);
2496 	u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
2500 	status = ixgbe_set_i2c_data(hw, &i2cctl, data);
2502 		ixgbe_raise_i2c_clk(hw, &i2cctl);
2507 		ixgbe_lower_i2c_clk(hw, &i2cctl);
2525  *  @i2cctl: Current value of I2CCTL register
2530 static void ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl)
2540 		*i2cctl |= clk_oe_bit;
2541 		IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), *i2cctl);
2545 		*i2cctl |= IXGBE_I2C_CLK_OUT_BY_MAC(hw);
2547 		IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), *i2cctl);
2561  *  @i2cctl: Current value of I2CCTL register
2566 static void ixgbe_lower_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl)
2570 	*i2cctl &= ~(IXGBE_I2C_CLK_OUT_BY_MAC(hw));
2571 	*i2cctl &= ~IXGBE_I2C_CLK_OE_N_EN_BY_MAC(hw);
2573 	IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), *i2cctl);
2583  *  @i2cctl: Current value of I2CCTL register
2589 static s32 ixgbe_set_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl, bool data)
2597 		*i2cctl |= IXGBE_I2C_DATA_OUT_BY_MAC(hw);
2599 		*i2cctl &= ~(IXGBE_I2C_DATA_OUT_BY_MAC(hw));
2600 	*i2cctl &= ~data_oe_bit;
2602 	IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), *i2cctl);
2611 		*i2cctl |= data_oe_bit;
2612 		IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), *i2cctl);
2617 	*i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
2618 	if (data != ixgbe_get_i2c_data(hw, i2cctl)) {
2631  *  @i2cctl: Current value of I2CCTL register
2636 static bool ixgbe_get_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl)
2644 		*i2cctl |= data_oe_bit;
2645 		IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), *i2cctl);
2650 	if (*i2cctl & IXGBE_I2C_DATA_IN_BY_MAC(hw))
2667 	u32 i2cctl;
2673 	i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
2675 	ixgbe_set_i2c_data(hw, &i2cctl, 1);
2678 		ixgbe_raise_i2c_clk(hw, &i2cctl);
2683 		ixgbe_lower_i2c_clk(hw, &i2cctl);