dev/isp/isp.c

252 		ISP_WRITE(isp, BIU2400_HCCR, HCCR_2400_CMD_CLEAR_HOST_INT);
253 		ISP_WRITE(isp, BIU2400_HCCR, HCCR_2400_CMD_CLEAR_RISC_INT);
254 		ISP_WRITE(isp, BIU2400_HCCR, HCCR_2400_CMD_PAUSE);
256 		ISP_WRITE(isp, HCCR, HCCR_CMD_PAUSE);
294 			ISP_WRITE(isp, BIU2100_CSR, BIU2100_FPM0_REGS);
295 			ISP_WRITE(isp, FPM_DIAG_CONFIG, FPM_SOFT_RESET);
296 			ISP_WRITE(isp, BIU2100_CSR, BIU2100_FB_REGS);
297 			ISP_WRITE(isp, FBM_CMD, FBMCMD_FIFO_RESET_ALL);
298 			ISP_WRITE(isp, BIU2100_CSR, BIU2100_RISC_REGS);
490 		ISP_WRITE(isp, BIU_ICR, BIU_ICR_SOFT_RESET);
499 		ISP_WRITE(isp, CDMA_CONTROL, DMA_CNTRL_CLEAR_CHAN | DMA_CNTRL_RESET_INT);
500 		ISP_WRITE(isp, DDMA_CONTROL, DMA_CNTRL_CLEAR_CHAN | DMA_CNTRL_RESET_INT);
507 		ISP_WRITE(isp, BIU2400_CSR, BIU2400_DMA_STOP|(3 << 4));
523 		ISP_WRITE(isp, BIU2400_CSR, BIU2400_SOFT_RESET|BIU2400_DMA_STOP|(3 << 4));
541 		ISP_WRITE(isp, BIU2100_CSR, BIU2100_SOFT_RESET);
550 		ISP_WRITE(isp, CDMA2100_CONTROL, DMA_CNTRL2100_CLEAR_CHAN | DMA_CNTRL2100_RESET_INT);
551 		ISP_WRITE(isp, TDMA2100_CONTROL, DMA_CNTRL2100_CLEAR_CHAN | DMA_CNTRL2100_RESET_INT);
552 		ISP_WRITE(isp, RDMA2100_CONTROL, DMA_CNTRL2100_CLEAR_CHAN | DMA_CNTRL2100_RESET_INT);
586 		ISP_WRITE(isp, BIU_CONF1, 0);
588 		ISP_WRITE(isp, BIU2100_CSR, 0);
595 		ISP_WRITE(isp, BIU2400_HCCR, HCCR_2400_CMD_RESET);
596 		ISP_WRITE(isp, BIU2400_HCCR, HCCR_2400_CMD_RELEASE);
597 		ISP_WRITE(isp, BIU2400_HCCR, HCCR_2400_CMD_CLEAR_RESET);
599 		ISP_WRITE(isp, HCCR, HCCR_CMD_RESET);
601 		ISP_WRITE(isp, BIU_SEMA, 0);
636 					ISP_WRITE(isp, RISC_MTR, 0x1313);
637 					ISP_WRITE(isp, HCCR, HCCR_CMD_STEP);
640 				ISP_WRITE(isp, RISC_MTR, 0x1212);
645 			ISP_WRITE(isp, RISC_EMB, DUAL_BANK);
647 			ISP_WRITE(isp, RISC_MTR, 0x1212);
649 		ISP_WRITE(isp, HCCR, HCCR_CMD_RELEASE);
651 		ISP_WRITE(isp, RISC_MTR2100, 0x1212);
653 			ISP_WRITE(isp, HCCR, HCCR_2X00_DISABLE_PARITY_PAUSE);
655 		ISP_WRITE(isp, HCCR, HCCR_CMD_RELEASE);
658 	ISP_WRITE(isp, isp->isp_rqstinrp, 0);
659 	ISP_WRITE(isp, isp->isp_rqstoutrp, 0);
660 	ISP_WRITE(isp, isp->isp_respinrp, 0);
661 	ISP_WRITE(isp, isp->isp_respoutrp, 0);
664 			ISP_WRITE(isp, BIU2400_PRI_REQINP, 0);
665 			ISP_WRITE(isp, BIU2400_PRI_REQOUTP, 0);
667 		ISP_WRITE(isp, BIU2400_ATIO_RSPINP, 0);
668 		ISP_WRITE(isp, BIU2400_ATIO_RSPOUTP, 0);
1412 		ISP_WRITE(isp, RISC_MTR, 0x1313);
5071 		ISP_WRITE(isp, isp->isp_respoutrp, isp->isp_resodx);
5111 			ISP_WRITE(isp, BIU2400_ATIO_RSPOUTP, optr);
5545 		ISP_WRITE(isp, isp->isp_respoutrp, optr);
5554 		ISP_WRITE(isp, BIU2400_HCCR, HCCR_2400_CMD_CLEAR_RISC_INT);
5556 		ISP_WRITE(isp, HCCR, HCCR_CMD_CLEAR_RISC_INT);
5557 		ISP_WRITE(isp, BIU_SEMA, 0);
6810 		ISP_WRITE(isp, BIU2400_HCCR, HCCR_2400_CMD_CLEAR_RISC_INT);
6812 		ISP_WRITE(isp, HCCR, HCCR_CMD_CLEAR_RISC_INT);
6813 		ISP_WRITE(isp, BIU_SEMA, 0);
7365 			ISP_WRITE(isp, MBOX_OFF(box), mbp->param[box]);
7377 		ISP_WRITE(isp, BIU2400_HCCR, HCCR_2400_CMD_SET_HOST_INT);
7379 		ISP_WRITE(isp, HCCR, HCCR_CMD_SET_HOST_INT);
7455 			ISP_WRITE(isp, MBOX_OFF(box), mbp->param[box]);
7472 		ISP_WRITE(isp, BIU2400_HCCR, HCCR_2400_CMD_SET_HOST_INT);
7474 		ISP_WRITE(isp, HCCR, HCCR_CMD_SET_HOST_INT);
7946 				ISP_WRITE(isp, BIU2100_CSR, BIU2100_FPM0_REGS);
7947 				ISP_WRITE(isp, FPM_DIAG_CONFIG, FPM_SOFT_RESET);
7948 				ISP_WRITE(isp, BIU2100_CSR, BIU2100_FB_REGS);
7949 				ISP_WRITE(isp, FBM_CMD, FBMCMD_FIFO_RESET_ALL);
7950 				ISP_WRITE(isp, BIU2100_CSR, BIU2100_RISC_REGS);
8086 	ISP_WRITE(isp, BIU_NVRAM, BIU_NVRAM_SELECT);
8088 	ISP_WRITE(isp, BIU_NVRAM, BIU_NVRAM_SELECT|BIU_NVRAM_CLOCK);
8117 		ISP_WRITE(isp, BIU_NVRAM, bit);
8120 		ISP_WRITE(isp, BIU_NVRAM, bit | BIU_NVRAM_CLOCK);
8123 		ISP_WRITE(isp, BIU_NVRAM, bit);
8134 		ISP_WRITE(isp, BIU_NVRAM, BIU_NVRAM_SELECT|BIU_NVRAM_CLOCK);
8141 		ISP_WRITE(isp, BIU_NVRAM, BIU_NVRAM_SELECT);
8145 	ISP_WRITE(isp, BIU_NVRAM, 0);
8163 	ISP_WRITE(isp, BIU2400_FLASH_ADDR, base | addr);