Lines Matching refs:HPT_U8
343 HPT_U8 MaximumControllers; /* maximum controllers the driver can support */
344 HPT_U8 SupportCrossControllerRAID; /* 1-support, 0-not support */
345 HPT_U8 MinimumBlockSizeShift; /* minimum block size shift */
346 HPT_U8 MaximumBlockSizeShift; /* maximum block size shift */
348 HPT_U8 SupportDiskModeSetting;
349 HPT_U8 SupportSparePool;
350 HPT_U8 MaximumArrayNameLength;
351 /* only one HPT_U8 left here! */
353 HPT_U8 reserved: 3;
354 HPT_U8 SupportVariableSectorSize: 1;
355 HPT_U8 SupportHotSwap: 1;
356 HPT_U8 HighPerformanceRAID1: 1;
357 HPT_U8 RebuildProcessInDriver: 1;
358 HPT_U8 SupportDedicatedSpare: 1;
360 HPT_U8 SupportDedicatedSpare: 1; /* call hpt_add_dedicated_spare() for dedicated spare. */
361 HPT_U8 RebuildProcessInDriver: 1; /* Windows only. used by mid layer for rebuild control. */
362 HPT_U8 HighPerformanceRAID1: 1;
363 HPT_U8 SupportHotSwap: 1;
364 HPT_U8 SupportVariableSectorSize: 1;
365 HPT_U8 reserved: 3;
369 HPT_U8 SupportedRAIDTypes[16];
371 HPT_U8 MaximumArrayMembers[16];
377 HPT_U8 SupportedCachePolicies[16];
386 HPT_U8 ChipType; /* chip type */
387 HPT_U8 InterruptLevel; /* IRQ level */
388 HPT_U8 NumBuses; /* bus count */
389 HPT_U8 ChipFlags;
391 HPT_U8 szProductID[MAX_NAME_LENGTH];/* product name */
392 HPT_U8 szVendorID[MAX_NAME_LENGTH]; /* vender name */
398 HPT_U8 ChipType; /* chip type */
399 HPT_U8 InterruptLevel; /* IRQ level */
400 HPT_U8 NumBuses; /* bus count */
401 HPT_U8 ChipFlags;
403 HPT_U8 szProductID[MAX_NAME_LENGTH];/* product name */
404 HPT_U8 szVendorID[MAX_NAME_LENGTH]; /* vender name */
408 HPT_U8 pci_tree;
409 HPT_U8 pci_bus;
410 HPT_U8 pci_device;
411 HPT_U8 pci_function;
428 HPT_U8 ChipType;
429 HPT_U8 InterruptLevel;
430 HPT_U8 NumBuses;
431 HPT_U8 ChipFlags;
432 HPT_U8 szProductID[MAX_NAME_LENGTH];
433 HPT_U8 szVendorID[MAX_NAME_LENGTH];
435 HPT_U8 pci_tree;
436 HPT_U8 pci_bus;
437 HPT_U8 pci_device;
438 HPT_U8 pci_function;
440 HPT_U8 IOPModel[32];
442 HPT_U8 BatteryInstalled;
443 HPT_U8 BatteryStatus;
447 HPT_U8 SerialNumber[32];
448 HPT_U8 BatteryMBInstalled;
449 HPT_U8 BatteryTemperature;
450 HPT_U8 reserve[86];
491 HPT_U8 Name[MAX_ARRAYNAME_LEN];/* array name */
492 HPT_U8 Description[64]; /* array description */
493 HPT_U8 CreateManager[16]; /* who created it */
496 HPT_U8 ArrayType; /* array type */
497 HPT_U8 BlockSizeShift; /* stripe size */
498 HPT_U8 nDisk; /* member count: Number of ID in Members[] */
499 HPT_U8 SubArrayType;
518 HPT_U8 Name[MAX_ARRAYNAME_LEN];/* array name */
519 HPT_U8 Description[64]; /* array description */
520 HPT_U8 CreateManager[16]; /* who created it */
523 HPT_U8 ArrayType; /* array type */
524 HPT_U8 BlockSizeShift; /* stripe size */
525 HPT_U8 nDisk; /* member count: Number of ID in Members[] */
526 HPT_U8 SubArrayType;
540 HPT_U8 Name[MAX_ARRAYNAME_LEN];/* array name */
541 HPT_U8 Description[64]; /* array description */
542 HPT_U8 CreateManager[16]; /* who created it */
545 HPT_U8 ArrayType; /* array type */
546 HPT_U8 BlockSizeShift; /* stripe size */
547 HPT_U8 nDisk; /* member count: Number of ID in Members[] */
548 HPT_U8 SubArrayType;
573 HPT_U8 Name[MAX_ARRAYNAME_LEN];/* array name */
574 HPT_U8 Description[64]; /* array description */
575 HPT_U8 CreateManager[16]; /* who created it */
578 HPT_U8 ArrayType; /* array type */
579 HPT_U8 BlockSizeShift; /* stripe size */
580 HPT_U8 nDisk; /* member count: Number of ID in Members[] */
581 HPT_U8 SubArrayType;
592 HPT_U8 SectorSizeShift; /*sector size = 512B<<SectorSizeShift*/
593 HPT_U8 reserved2[7];
619 HPT_U8 MaximumBlockTransfer;
620 HPT_U8 VendorUnique2;
624 HPT_U8 VendorUnique3;
625 HPT_U8 PioCycleTimingMode;
626 HPT_U8 VendorUnique4;
627 HPT_U8 DmaCycleTimingMode;
635 HPT_U8 SingleWordDMASupport;
636 HPT_U8 SingleWordDMAActive;
637 HPT_U8 MultiWordDMASupport;
638 HPT_U8 MultiWordDMAActive;
639 HPT_U8 AdvancedPIOModes;
640 HPT_U8 Reserved4;
655 * IdentifyData.ModelNumber[] is HPT_U8-swapped from the original identify data.
658 HPT_U8 ControllerId; /* controller id */
659 HPT_U8 PathId; /* bus */
660 HPT_U8 TargetId; /* id */
661 HPT_U8 DeviceModeSetting; /* Current Data Transfer mode: 0-4 PIO 0-4 */
663 HPT_U8 DeviceType; /* device type */
664 HPT_U8 UsableMode; /* highest usable mode */
667 HPT_U8 NCQEnabled: 1;
668 HPT_U8 NCQSupported: 1;
669 HPT_U8 TCQEnabled: 1;
670 HPT_U8 TCQSupported: 1;
671 HPT_U8 WriteCacheEnabled: 1;
672 HPT_U8 WriteCacheSupported: 1;
673 HPT_U8 ReadAheadEnabled: 1;
674 HPT_U8 ReadAheadSupported: 1;
675 HPT_U8 reserved6: 6;
676 HPT_U8 SpinUpMode: 2;
678 HPT_U8 ReadAheadSupported: 1;
679 HPT_U8 ReadAheadEnabled: 1;
680 HPT_U8 WriteCacheSupported: 1;
681 HPT_U8 WriteCacheEnabled: 1;
682 HPT_U8 TCQSupported: 1;
683 HPT_U8 TCQEnabled: 1;
684 HPT_U8 NCQSupported: 1;
685 HPT_U8 NCQEnabled: 1;
686 HPT_U8 SpinUpMode: 2;
687 HPT_U8 reserved6: 6;
701 * IdentifyData.ModelNumber[] is HPT_U8-swapped from the original identify data.
704 HPT_U8 ControllerId; /* controller id */
705 HPT_U8 PathId; /* bus */
706 HPT_U8 TargetId; /* id */
707 HPT_U8 DeviceModeSetting; /* Current Data Transfer mode: 0-4 PIO 0-4 */
709 HPT_U8 DeviceType; /* device type */
710 HPT_U8 UsableMode; /* highest usable mode */
713 HPT_U8 NCQEnabled: 1;
714 HPT_U8 NCQSupported: 1;
715 HPT_U8 TCQEnabled: 1;
716 HPT_U8 TCQSupported: 1;
717 HPT_U8 WriteCacheEnabled: 1;
718 HPT_U8 WriteCacheSupported: 1;
719 HPT_U8 ReadAheadEnabled: 1;
720 HPT_U8 ReadAheadSupported: 1;
721 HPT_U8 reserved6: 6;
722 HPT_U8 SpinUpMode: 2;
724 HPT_U8 ReadAheadSupported: 1;
725 HPT_U8 ReadAheadEnabled: 1;
726 HPT_U8 WriteCacheSupported: 1;
727 HPT_U8 WriteCacheEnabled: 1;
728 HPT_U8 TCQSupported: 1;
729 HPT_U8 TCQEnabled: 1;
730 HPT_U8 NCQSupported: 1;
731 HPT_U8 NCQEnabled: 1;
732 HPT_U8 SpinUpMode: 2;
733 HPT_U8 reserved6: 6;
789 HPT_U8 Type; /* LDT_ARRAY or LDT_DEVICE */
790 HPT_U8 reserved[3];
804 HPT_U8 Type; /* LDT_ARRAY or LDT_DEVICE */
805 HPT_U8 reserved[3];
824 HPT_U8 Type; /* LDT_ARRAY or LDT_DEVICE */
825 HPT_U8 CachePolicy; /* refer to CACHE_POLICY_xxx */
826 HPT_U8 VBusId; /* vbus sequence in vbus_list */
827 HPT_U8 TargetId; /* OS target id. Value 0xFF is invalid */
850 HPT_U8 revision;
851 HPT_U8 reserved[7];
853 HPT_U8 Type; /* LDT_ARRAY or LDT_DEVICE */
854 HPT_U8 CachePolicy; /* refer to CACHE_POLICY_xxx */
855 HPT_U8 VBusId; /* vbus sequence in vbus_list */
856 HPT_U8 TargetId; /* OS target id. Value 0xFF is invalid */
899 HPT_U8 Name[MAX_ARRAYNAME_LEN]; /* array name */
900 HPT_U8 Description[64]; /* array description */
905 HPT_U8 DeviceModeSetting; /* 0-4 PIO 0-4, 5-7 MW DMA0-2, 8-13 UDMA0-5 */
910 HPT_U8 DeviceModeSetting; /* 0-4 PIO 0-4, 5-7 MW DMA0-2, 8-13 UDMA0-5 */
911 HPT_U8 TCQEnabled;
912 HPT_U8 NCQEnabled;
913 HPT_U8 WriteCacheEnabled;
914 HPT_U8 ReadAheadEnabled;
915 HPT_U8 SpinUpMode;
916 HPT_U8 reserve[2];
940 HPT_U8 target_type;
941 HPT_U8 infor_type;
943 #define SET_VDEV_INFO_param(p) ((HPT_U8 *)(p)+sizeof(SET_VDEV_INFO))
944 /* HPT_U8 param[0]; */
947 typedef HPT_U8 PARAM_ARRAY_NAME[MAX_ARRAYNAME_LEN] ;
948 typedef HPT_U8 PARAM_ARRAY_DES[64];
949 typedef HPT_U8 PARAM_DEVICE_MODE, PARAM_TCQ, PARAM_NCQ, PARAM_READ_AHEAD, PARAM_WRITE_CACHE, PARAM_CACHE_POLICY;
958 HPT_U8 ArrayType; /* 1-level array type */
959 HPT_U8 nDisk; /* number of elements in Members[] array */
960 HPT_U8 BlockSizeShift; /* Stripe size if ArrayType==AT_RAID0 / AT_RAID5 */
961 HPT_U8 CreateFlags; /* See CAF_xxx */
963 HPT_U8 ArrayName[MAX_ARRAYNAME_LEN];/* Array name */
964 HPT_U8 Description[64]; /* array description */
965 HPT_U8 CreateManager[16]; /* who created it */
974 HPT_U8 ArrayType; /* 1-level array type */
975 HPT_U8 nDisk; /* number of elements in Members[] array */
976 HPT_U8 BlockSizeShift; /* Stripe size if ArrayType==AT_RAID0 / AT_RAID5 */
977 HPT_U8 CreateFlags; /* See CAF_xxx */
979 HPT_U8 ArrayName[MAX_ARRAYNAME_LEN];/* Array name */
980 HPT_U8 Description[64]; /* array description */
981 HPT_U8 CreateManager[16]; /* who created it */
993 HPT_U8 revision; /*CREATE_ARRAY_PARAMS_V3_REVISION*/
994 HPT_U8 reserved[6];
995 HPT_U8 SectorSizeShift; /*sector size = 512B<<SectorSizeShift*/
996 HPT_U8 ArrayType; /* 1-level array type */
997 HPT_U8 nDisk; /* number of elements in Members[] array */
998 HPT_U8 BlockSizeShift; /* Stripe size if ArrayType==AT_RAID0 / AT_RAID5 */
999 HPT_U8 CreateFlags; /* See CAF_xxx */
1001 HPT_U8 ArrayName[MAX_ARRAYNAME_LEN];/* Array name */
1002 HPT_U8 Description[64]; /* array description */
1003 HPT_U8 CreateManager[16]; /* who created it */
1104 HPT_U8 EventType;
1105 HPT_U8 reserved[3];
1107 HPT_U8 Data[32]; /* various data depend on EventType */
1118 HPT_U8 bFeaturesReg; /* feature register */
1119 HPT_U8 bSectorCountReg; /* IDE sector count register. */
1120 HPT_U8 bLbaLowReg; /* IDE LBA low value. */
1121 HPT_U8 bLbaMidReg; /* IDE LBA mid register. */
1122 HPT_U8 bLbaHighReg; /* IDE LBA high value. */
1123 HPT_U8 bDriveHeadReg; /* IDE drive/head register. */
1124 HPT_U8 bCommandReg; /* Actual IDE command. Checked for validity by driver. */
1125 HPT_U8 nSectors; /* data size in sectors, if the command has data transfer */
1126 HPT_U8 protocol; /* IO_COMMAND_(READ,WRITE) or zero for non-DATA */
1127 HPT_U8 reserve[3];
1128 #define IDE_PASS_THROUGH_buffer(p) ((HPT_U8 *)(p) + sizeof(IDE_PASS_THROUGH_HEADER))
1129 /* HPT_U8 DataBuffer[0]; */
1135 HPT_U8 protocol;
1136 HPT_U8 reserve1;
1137 HPT_U8 reserve2;
1138 HPT_U8 cdbLength;
1139 HPT_U8 cdb[16];
1146 HPT_U8 scsiStatus;
1147 HPT_U8 reserve1;
1148 HPT_U8 reserve2;
1149 HPT_U8 reserve3;
1162 HPT_U8 Command; /* IO_COMMAD_xxx */
1163 HPT_U8 BufferType; /* BUFFER_TYPE_xxx, see below */
1178 HPT_U8 value[32];
1179 HPT_U8 type; /* HPT_DRIVER_PARAMETER_TYPE_* */
1180 HPT_U8 persistent;
1181 HPT_U8 reserve2[2];
1182 HPT_U8 location; /* 0 - system */
1183 HPT_U8 controller;
1184 HPT_U8 bus;
1185 HPT_U8 reserve1;
1446 int hpt_rebuild_data_block(DEVICEID idMirror, HPT_U32 Lba, HPT_U8 nSector);
1541 int hpt_lock_device(DEVICEID idDisk, HPT_U32 Lba, HPT_U8 nSectors);
1588 int hpt_verify_data_block(DEVICEID idArray, HPT_U32 Lba, HPT_U8 nSectors);
1600 int hpt_initialize_data_block(DEVICEID idArray, HPT_U32 Lba, HPT_U8 nSectors);
1860 int hpt_i2c_transaction(HPT_U8 *indata, HPT_U32 inlen, HPT_U8 *outdata, HPT_U32 outlen, HPT_U32 *poutlen);