Lines Matching refs:args

222 	struct drm_radeon_gem_info *args = data;
228 args->vram_size = rdev->mc.real_vram_size;
229 args->vram_visible = (u64)man->size << PAGE_SHIFT;
231 args->vram_visible -= radeon_bo_size(rdev->stollen_vga_memory);
232 args->vram_visible -= radeon_fbdev_total_size(rdev);
233 args->gart_size = rdev->mc.gtt_size - 4096 - RADEON_IB_POOL_SIZE*64*1024;
235 args->gart_size -= rdev->ring[i].ring_size;
259 struct drm_radeon_gem_create *args = data;
266 args->size = roundup(args->size, PAGE_SIZE);
267 r = radeon_gem_object_create(rdev, args->size, args->alignment,
268 args->initial_domain, false,
285 args->handle = handle;
296 struct drm_radeon_gem_set_domain *args = data;
306 gobj = drm_gem_object_lookup(dev, filp, args->handle);
313 r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain);
341 struct drm_radeon_gem_mmap *args = data;
343 return radeon_mode_dumb_mmap(filp, dev, args->handle, &args->addr_ptr);
350 struct drm_radeon_gem_busy *args = data;
356 gobj = drm_gem_object_lookup(dev, filp, args->handle);
364 args->domain = RADEON_GEM_DOMAIN_VRAM;
367 args->domain = RADEON_GEM_DOMAIN_GTT;
370 args->domain = RADEON_GEM_DOMAIN_CPU;
383 struct drm_radeon_gem_wait_idle *args = data;
388 gobj = drm_gem_object_lookup(dev, filp, args->handle);
407 struct drm_radeon_gem_set_tiling *args = data;
412 DRM_DEBUG("%d \n", args->handle);
413 gobj = drm_gem_object_lookup(dev, filp, args->handle);
417 r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch);
425 struct drm_radeon_gem_get_tiling *args = data;
431 gobj = drm_gem_object_lookup(dev, filp, args->handle);
438 radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch);
448 struct drm_radeon_gem_va *args = data;
458 args->operation = RADEON_VA_RESULT_ERROR;
467 if (args->vm_id) {
468 args->operation = RADEON_VA_RESULT_ERROR;
472 if (args->offset < RADEON_VA_RESERVED_SIZE) {
475 (unsigned long)args->offset,
477 args->operation = RADEON_VA_RESULT_ERROR;
486 if ((args->flags & invalid_flags)) {
488 args->flags, invalid_flags);
489 args->operation = RADEON_VA_RESULT_ERROR;
492 if (!(args->flags & RADEON_VM_PAGE_SNOOPED)) {
494 args->operation = RADEON_VA_RESULT_ERROR;
498 switch (args->operation) {
504 args->operation);
505 args->operation = RADEON_VA_RESULT_ERROR;
509 gobj = drm_gem_object_lookup(dev, filp, args->handle);
511 args->operation = RADEON_VA_RESULT_ERROR;
517 args->operation = RADEON_VA_RESULT_ERROR;
523 args->operation = RADEON_VA_RESULT_ERROR;
528 switch (args->operation) {
531 args->operation = RADEON_VA_RESULT_VA_EXIST;
532 args->offset = bo_va->soffset;
535 r = radeon_vm_bo_set_addr(rdev, bo_va, args->offset, args->flags);
543 args->operation = RADEON_VA_RESULT_OK;
545 args->operation = RADEON_VA_RESULT_ERROR;
555 struct drm_mode_create_dumb *args)
562 args->pitch = radeon_align_pitch(rdev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8);
563 args->size = args->pitch * args->height;
564 args->size = roundup2(args->size, PAGE_SIZE);
566 r = radeon_gem_object_create(rdev, args->size, 0,
579 args->handle = handle;