Lines Matching refs:xf
53 #define IVB_GMCH_GMS_MASK 0xf
59 #define GC_CLOCK_CONTROL_MASK (0xf << 0)
70 #define GM45_GC_RENDER_CLOCK_MASK (0xf << 0)
75 #define I965_GC_RENDER_CLOCK_MASK (0xf << 0)
347 #define DPIO_BYTE (0xf<<4)
996 #define PLL_LOAD_PULSE_PHASE_MASK (0xf << PLL_LOAD_PULSE_PHASE_SHIFT)
1875 #define PP_SEQUENCE_STATE_RESET (0xf << 0)
2014 # define TV_CTL_SAVE ((1 << 11) | (3 << 9) | (7 << 6) | 0xf)
2582 #define DP_AUX_CH_CTL_PRECHARGE_2US_MASK (0xf << 16)
2864 #define WM1_LP_FBC_MASK (0xf<<20)
2920 #define SNB_FBC_MAX_SRWM 0xf /* bit 23:20 */
3018 #define DISPPLANE_PIXFORMAT_MASK (0xf<<26)
3031 #define DISPPLANE_RGBA888 (0xf<<26)
3527 #define SDE_HOTPLUG_MASK (0xf << 8)
4338 #define G4X_ELD_ADDR (0xf << 5)
4394 #define AUD_CONFIG_PIXEL_CLOCK_HDMI (0xf << 16)
4531 #define DDI_BUF_EMP_MASK (0xf<<24)