dev/drm/radeon_cp.c

857 			  (long)dev_priv->gart_info.bus_addr,
877 		temp = dev_priv->gart_info.bus_addr & 0xfffff000;
878 		temp |= (upper_32_bits(dev_priv->gart_info.bus_addr) & 0xff) << 4;
929 			 (long)dev_priv->gart_info.bus_addr,
953 				dev_priv->gart_info.bus_addr);
1003 			  (long)dev_priv->gart_info.bus_addr,
1008 				  dev_priv->gart_info.bus_addr);
1055 		RADEON_WRITE(RADEON_AIC_PT_BASE, dev_priv->gart_info.bus_addr);
1075 	struct drm_ati_pcigart_info *gart_info = &dev_priv->gart_info;
1094 		vp->lower = gart_info->bus_addr;
1095 		vp->upper = vp->lower + gart_info->table_size;
1411 		dev_priv->gart_info.table_mask = DMA_BIT_MASK(32);
1414 			dev_priv->gart_info.bus_addr =
1416 			dev_priv->gart_info.mapping.offset =
1418 			dev_priv->gart_info.mapping.size =
1419 			    dev_priv->gart_info.table_size;
1421 			drm_core_ioremap_wc(&dev_priv->gart_info.mapping, dev);
1422 			dev_priv->gart_info.addr =
1423 			    dev_priv->gart_info.mapping.virtual;
1426 				dev_priv->gart_info.gart_reg_if = DRM_ATI_GART_PCIE;
1428 				dev_priv->gart_info.gart_reg_if = DRM_ATI_GART_PCI;
1429 			dev_priv->gart_info.gart_table_location =
1433 				  dev_priv->gart_info.addr,
1437 				dev_priv->gart_info.gart_reg_if = DRM_ATI_GART_IGP;
1439 				dev_priv->gart_info.gart_reg_if = DRM_ATI_GART_PCI;
1440 			dev_priv->gart_info.gart_table_location =
1442 			dev_priv->gart_info.addr = NULL;
1443 			dev_priv->gart_info.bus_addr = 0;
1457 			ret = drm_ati_pcigart_init(dev, &dev_priv->gart_info);
1470 				r600_page_table_cleanup(dev, &dev_priv->gart_info);
1472 				drm_ati_pcigart_cleanup(dev, &dev_priv->gart_info);
1522 		if (dev_priv->gart_info.bus_addr) {
1526 				r600_page_table_cleanup(dev, &dev_priv->gart_info);
1528 				if (!drm_ati_pcigart_cleanup(dev, &dev_priv->gart_info))
1533 		if (dev_priv->gart_info.gart_table_location == DRM_ATI_GART_FB)
1535 			drm_core_ioremapfree(&dev_priv->gart_info.mapping, dev);
1536 			dev_priv->gart_info.addr = 0;
2066 	dev_priv->gart_info.table_size = RADEON_PCIGART_TABLE_SIZE;