Lines Matching defs:cmd
553 u32 *cmd = (u32 *) cmdbuf->buf;
557 count=(cmd[0]>>16) & 0x3fff;
559 if (cmd[0] & 0x8000) {
562 if (cmd[1] & (RADEON_GMC_SRC_PITCH_OFFSET_CNTL
564 offset = cmd[2] << 10;
572 if ((cmd[1] & RADEON_GMC_SRC_PITCH_OFFSET_CNTL) &&
573 (cmd[1] & RADEON_GMC_DST_PITCH_OFFSET_CNTL)) {
574 offset = cmd[3] << 10;
585 OUT_RING(cmd[0]);
598 u32 *cmd;
603 cmd = (u32 *) cmdbuf->buf;
604 count = (cmd[0]>>16) & 0x3fff;
605 expected_count = cmd[1] >> 16;
606 if (!(cmd[1] & R300_VAP_VF_CNTL__INDEX_SIZE_32bit))
616 OUT_RING(cmd[0]);
635 cmd = (u32 *) cmdbuf->buf;
639 cmd[0] != CP_PACKET3(RADEON_CP_INDX_BUFFER, 2)) {
644 if ((cmd[1] & 0x8000ffff) != 0x80000810) {
645 DRM_ERROR("Invalid indx_buffer reg address %08X\n", cmd[1]);
648 if (!radeon_check_offset(dev_priv, cmd[2])) {
649 DRM_ERROR("Invalid indx_buffer offset is %08X\n", cmd[2]);
652 if (cmd[3] != expected_count) {
654 cmd[3], expected_count);
659 OUT_RING(cmd[0]);