dev/bm/if_bm.c

172 	CSR_WRITE_2(sc, BM_MII_CSR, val);
228 		CSR_WRITE_2(sc, BM_TX_CONFIG, reg);
242 		CSR_WRITE_2(sc, BM_TX_CONFIG, reg);
916 	CSR_WRITE_2(sc, BM_RX_CONFIG, reg);
923 		CSR_WRITE_2(sc, BM_RX_CONFIG, reg);
929 		CSR_WRITE_2(sc, BM_RX_CONFIG, reg);
956 	CSR_WRITE_2(sc, BM_HASHTAB0, hash[0]);
957 	CSR_WRITE_2(sc, BM_HASHTAB1, hash[1]);
958 	CSR_WRITE_2(sc, BM_HASHTAB2, hash[2]);
959 	CSR_WRITE_2(sc, BM_HASHTAB3, hash[3]);
963 	CSR_WRITE_2(sc, BM_RX_CONFIG, reg);
970 	CSR_WRITE_2(sc, BM_RX_CONFIG, reg);
994 	CSR_WRITE_2(sc, BM_RX_RESET, 0x0000);
995 	CSR_WRITE_2(sc, BM_TX_RESET, 0x0001);
1003 	CSR_WRITE_2(sc,	BM_TX_RANDSEED, eaddr_sect[2]);
1008 	CSR_WRITE_2(sc, BM_TX_IFC, reg);
1022 	CSR_WRITE_2(sc, BM_TX_CONFIG, reg);
1026 	CSR_WRITE_2(sc, BM_RX_CONFIG, reg);
1119 	CSR_WRITE_2(sc, BM_TX_NCCNT, 0);
1120 	CSR_WRITE_2(sc, BM_TX_FCCNT, 0);
1121 	CSR_WRITE_2(sc, BM_TX_EXCNT, 0);
1122 	CSR_WRITE_2(sc, BM_TX_LTCNT, 0);
1125 	CSR_WRITE_2(sc, BM_RX_FRCNT, 0);
1126 	CSR_WRITE_2(sc, BM_RX_LECNT, 0);
1127 	CSR_WRITE_2(sc, BM_RX_AECNT, 0);
1128 	CSR_WRITE_2(sc, BM_RX_FECNT, 0);
1129 	CSR_WRITE_2(sc, BM_RXCV, 0);
1132 	CSR_WRITE_2(sc, BM_TX_THRESH, 0xff);
1134 	CSR_WRITE_2(sc, BM_TXFIFO_CSR, 0);
1135 	CSR_WRITE_2(sc, BM_TXFIFO_CSR, 0x0001);
1138 	CSR_WRITE_2(sc, BM_RXFIFO_CSR, 0);
1139 	CSR_WRITE_2(sc, BM_RXFIFO_CSR, 0x0001);
1145 	CSR_WRITE_2(sc, BM_HASHTAB0, 0);
1146 	CSR_WRITE_2(sc, BM_HASHTAB1, 0);
1147 	CSR_WRITE_2(sc, BM_HASHTAB2, 0);
1148 	CSR_WRITE_2(sc, BM_HASHTAB3, 0);
1151 	CSR_WRITE_2(sc, BM_MACADDR0, eaddr_sect[0]);
1152 	CSR_WRITE_2(sc, BM_MACADDR1, eaddr_sect[1]);
1153 	CSR_WRITE_2(sc, BM_MACADDR2, eaddr_sect[2]);
1157 	CSR_WRITE_2(sc, BM_RX_CONFIG, reg);
1169 	CSR_WRITE_2(sc, BM_TX_CONFIG, reg);
1208 	CSR_WRITE_2(sc, BM_TX_NCCNT, 0);
1209 	CSR_WRITE_2(sc, BM_TX_FCCNT, 0);
1210 	CSR_WRITE_2(sc, BM_TX_EXCNT, 0);
1211 	CSR_WRITE_2(sc, BM_TX_LTCNT, 0);
1214 	CSR_WRITE_2(sc, BM_RX_FRCNT, 0);
1215 	CSR_WRITE_2(sc, BM_RX_LECNT, 0);
1216 	CSR_WRITE_2(sc, BM_RX_AECNT, 0);
1217 	CSR_WRITE_2(sc, BM_RX_FECNT, 0);
1218 	CSR_WRITE_2(sc, BM_RXCV, 0);
1288 	CSR_WRITE_2(sc, BM_INTR_DISABLE,
1295 	CSR_WRITE_2(sc, BM_INTR_DISABLE, BM_INTR_NONE);