Lines Matching defs:adw

164 static u_int16_t	adw_eeprom_read_16(struct adw_softc *adw, int addr);
165 static void adw_eeprom_write_16(struct adw_softc *adw, int addr,
167 static void adw_eeprom_wait(struct adw_softc *adw);
170 adw_find_signature(struct adw_softc *adw)
172 if (adw_inb(adw, ADW_SIGNATURE_BYTE) == ADW_CHIP_ID_BYTE
173 && adw_inw(adw, ADW_SIGNATURE_WORD) == ADW_CHIP_ID_WORD)
182 adw_reset_chip(struct adw_softc *adw)
184 adw_outw(adw, ADW_CTRL_REG, ADW_CTRL_REG_CMD_RESET);
186 adw_outw(adw, ADW_CTRL_REG, ADW_CTRL_REG_CMD_WR_IO_REG);
191 adw_outw(adw, ADW_SCSI_CFG1,
192 adw_inw(adw, ADW_SCSI_CFG1) & ~ADW_SCSI_CFG1_BIG_ENDIAN);
199 adw_reset_bus(struct adw_softc *adw)
204 mtx_assert(&adw->lock, MA_OWNED);
206 adw_idle_cmd_send(adw, ADW_IDLE_CMD_SCSI_RESET_START, /*param*/0);
208 xpt_print_path(adw->path);
214 adw_idle_cmd_send(adw, ADW_IDLE_CMD_SCSI_RESET_END, /*param*/0);
216 xpt_print_path(adw->path);
227 adw_eeprom_read_16(struct adw_softc *adw, int addr)
229 adw_outw(adw, ADW_EEP_CMD, ADW_EEP_CMD_READ | addr);
230 adw_eeprom_wait(adw);
231 return (adw_inw(adw, ADW_EEP_DATA));
235 adw_eeprom_write_16(struct adw_softc *adw, int addr, u_int data)
237 adw_outw(adw, ADW_EEP_DATA, data);
238 adw_outw(adw, ADW_EEP_CMD, ADW_EEP_CMD_WRITE | addr);
239 adw_eeprom_wait(adw);
246 adw_eeprom_wait(struct adw_softc *adw)
251 if ((adw_inw(adw, ADW_EEP_CMD) & ADW_EEP_CMD_DONE) != 0)
257 device_get_nameunit(adw->device));
266 adw_eeprom_read(struct adw_softc *adw, struct adw_eeprom *eep_buf)
279 wval = adw_eeprom_read_16(adw, eep_addr);
285 *wbuf = adw_eeprom_read_16(adw, eep_addr);
292 *wbuf = adw_eeprom_read_16(adw, eep_addr);
298 adw_eeprom_write(struct adw_softc *adw, struct adw_eeprom *eep_buf)
307 adw_outw(adw, ADW_EEP_CMD, ADW_EEP_CMD_WRITE_ABLE);
308 adw_eeprom_wait(adw);
316 adw_eeprom_write_16(adw, addr, *wbuf);
322 adw_eeprom_write_16(adw, addr, chksum);
332 adw_eeprom_write_16(adw, addr, *wbuf);
334 adw_outw(adw, ADW_EEP_CMD, ADW_EEP_CMD_WRITE_DISABLE);
335 adw_eeprom_wait(adw);
339 adw_init_chip(struct adw_softc *adw, u_int term_scsicfg1)
359 biosmem[addr] = adw_lram_read_8(adw, ADW_MC_BIOSMEM + addr);
370 && (adw->flags & ADW_EEPROM_FAILED) != 0) {
378 if ((adw->chip == ADW_CHIP_ASC3550)
385 adw->user_wdtr =
386 adw_lram_read_16(adw, ADW_MC_WDTR_ABLE_BIOS_31);
388 adw->user_wdtr =
389 adw_lram_read_16(adw, ADW_MC_WDTR_ABLE);
391 sdtr_able = adw_lram_read_16(adw, ADW_MC_SDTR_ABLE);
399 else if ((adw->features & ADW_DT) != 0)
401 else if ((adw->features & ADW_ULTRA2) != 0)
405 adw_set_user_sdtr(adw, tid, mc_sdtr);
407 adw->user_tagenb = adw_lram_read_16(adw, ADW_MC_TAGQNG_ABLE);
434 word_table = (const u_int16_t *)adw->mcode_data->mcode_buf;
436 byte_codes_end = adw->mcode_data->mcode_buf
437 + adw->mcode_data->mcode_size;
438 adw_outw(adw, ADW_RAM_ADDR, 0);
445 adw_set_multi_2(adw, ADW_RAM_DATA,
454 adw_outw(adw, ADW_RAM_DATA, value);
458 adw_outw(adw, ADW_RAM_DATA, word_table[*byte_codes]);
469 for (addr = bytes_downloaded; addr < adw->memsize; addr += 2)
470 adw_outw(adw, ADW_RAM_DATA, 0);
476 adw_outw(adw, ADW_RAM_ADDR, 0);
478 checksum += adw_inw(adw, ADW_RAM_DATA);
480 if (checksum != adw->mcode_data->mcode_chksum) {
481 device_printf(adw->device, "Firmware load failed!\n");
489 adw_lram_write_8(adw, addr + ADW_MC_BIOSLEN, biosmem[addr]);
495 addr = adw_lram_read_16(adw, ADW_MC_CODE_BEGIN_ADDR);
496 end_addr = adw_lram_read_16(adw, ADW_MC_CODE_END_ADDR);
498 adw_outw(adw, ADW_RAM_ADDR, addr);
500 checksum += adw_inw(adw, ADW_RAM_DATA);
501 adw_lram_write_16(adw, ADW_MC_CODE_CHK_SUM, checksum);
506 adw_lram_write_16(adw, ADW_MC_CHIP_TYPE, adw->chip);
515 adw_lram_write_16(adw, ADW_MC_SDTR_SPEED1, adw->user_sdtr[0]);
516 adw_lram_write_16(adw, ADW_MC_SDTR_SPEED2, adw->user_sdtr[1]);
517 adw_lram_write_16(adw, ADW_MC_SDTR_SPEED3, adw->user_sdtr[2]);
518 adw_lram_write_16(adw, ADW_MC_SDTR_SPEED4, adw->user_sdtr[3]);
519 adw_lram_write_16(adw, ADW_MC_DISC_ENABLE, adw->user_discenb);
522 adw_lram_write_8(adw, ADW_MC_NUMBER_OF_MAX_CMD + tid,
523 adw->max_acbs);
525 adw_lram_write_16(adw, ADW_MC_TAGQNG_ABLE, ~0);
533 adw_lram_write_16(adw, ADW_MC_DEFAULT_SCSI_CFG0,
535 ADW_SCSI_CFG0_OUR_ID_EN|adw->initiator_id);
541 adw_lram_write_16(adw, ADW_MC_DEFAULT_MEM_CFG,
542 adw_inb(adw, ADW_MEM_CFG) & ADW_MEM_CFG_RAM_SZ_MASK);
550 scsicfg1 = adw_inw(adw, ADW_SCSI_CFG1);
557 if ((adw_inw(adw, ADW_SCSI_CTRL) & 0x3F07) == 0x3F07) {
558 device_printf(adw->device, "Illegal Cable Config!\n");
559 device_printf(adw->device, "Internal cable is reversed!\n");
567 if ((adw->features & ADW_ULTRA) != 0) {
570 device_printf(adw->device, "A Single Ended Device is "
576 device_printf(adw->device,
579 device_printf(adw->device,
588 if ((adw->features & ADW_ULTRA2) != 0) {
595 adw_outw(adw, ADW_SCSI_CFG1,
597 cable_det = adw_inw(adw, ADW_SCSI_CFG1);
598 adw_outw(adw, ADW_SCSI_CFG1, scsicfg1);
655 device_printf(adw->device,
657 device_printf(adw->device,
688 if ((adw->features & ADW_ULTRA2) != 0
698 if ((adw->features & ADW_ULTRA2) != 0) {
721 adw_lram_write_16(adw, ADW_MC_DEFAULT_SCSI_CFG1, scsicfg1);
727 adw_lram_write_16(adw, ADW_MC_DEFAULT_SEL_MASK,
728 (0x01 << adw->initiator_id));
735 adw->commandq = adw->free_carriers;
736 adw->free_carriers = carrierbotov(adw, adw->commandq->next_ba);
737 adw->commandq->next_ba = ADW_CQ_STOPPER;
738 adw_lram_write_32(adw, ADW_MC_ICQ, adw->commandq->carr_ba);
745 adw->responseq = adw->free_carriers;
746 adw->free_carriers = carrierbotov(adw, adw->responseq->next_ba);
747 adw->responseq->next_ba = ADW_CQ_STOPPER;
748 adw_lram_write_32(adw, ADW_MC_IRQ, adw->responseq->carr_ba);
750 adw_outb(adw, ADW_INTR_ENABLES,
753 adw_outw(adw, ADW_PC, adw_lram_read_16(adw, ADW_MC_CODE_BEGIN_ADDR));
759 adw_set_user_sdtr(struct adw_softc *adw, u_int tid, u_int mc_sdtr)
761 adw->user_sdtr[ADW_TARGET_GROUP(tid)] &= ~ADW_TARGET_GROUP_MASK(tid);
762 adw->user_sdtr[ADW_TARGET_GROUP(tid)] |=
767 adw_get_user_sdtr(struct adw_softc *adw, u_int tid)
771 mc_sdtr = adw->user_sdtr[ADW_TARGET_GROUP(tid)];
778 adw_set_chip_sdtr(struct adw_softc *adw, u_int tid, u_int sdtr)
785 mc_sdtr = adw_lram_read_16(adw, mc_sdtr_offset);
788 adw_lram_write_16(adw, mc_sdtr_offset, mc_sdtr);
792 adw_get_chip_sdtr(struct adw_softc *adw, u_int tid)
799 mc_sdtr = adw_lram_read_16(adw, mc_sdtr_offset);
806 adw_find_sdtr(struct adw_softc *adw, u_int period)
811 if ((adw->features & ADW_DT) == 0)
813 if ((adw->features & ADW_ULTRA2) == 0)
826 adw_find_period(struct adw_softc *adw, u_int mc_sdtr)
856 adw_idle_cmd_send(struct adw_softc *adw, adw_idle_cmd_t cmd, u_int parameter)
862 mtx_assert(&adw->lock, MA_OWNED);
868 adw_lram_write_16(adw, ADW_MC_IDLE_CMD_STATUS, 0);
876 adw_lram_write_32(adw, ADW_MC_IDLE_CMD_PARAMETER, parameter);
877 adw_lram_write_16(adw, ADW_MC_IDLE_CMD, cmd);
882 adw_tickle_risc(adw, ADW_TICKLE_B);
887 status = adw_lram_read_16(adw, ADW_MC_IDLE_CMD_STATUS);
895 device_get_nameunit(adw->device));