contrib/octeon-sdk/cvmx-spi4000.c

89 #define SPI4000_TWSI_ID(interface)  (0x66 + interface)
121  * @param interface Interface the SPI4000 is on. (0 or 1)
125 static void __cvmx_spi4000_write(int interface, int address, uint32_t data)
128     cvmx_twsix_write_ia(0, SPI4000_TWSI_ID(interface), SPI4000_WRITE_ADDRESS_HIGH, 2, 1, address);
129     cvmx_twsix_write_ia(0, SPI4000_TWSI_ID(interface), SPI4000_WRITE_DATA0, 4, 1, data);
131     status = cvmx_twsi_read8(SPI4000_TWSI_ID(interface), SPI4000_DO_WRITE);
133         status = cvmx_twsi_read8(SPI4000_TWSI_ID(interface), SPI4000_GET_WRITE_STATUS);
144  * @param interface Interface the SPI4000 is on. (0 or 1)
149 static uint32_t __cvmx_spi4000_read(int interface, int address)
154     cvmx_twsix_write_ia(0, SPI4000_TWSI_ID(interface), SPI4000_READ_ADDRESS_HIGH, 2, 1, address);
156     status = cvmx_twsi_read8(SPI4000_TWSI_ID(interface), SPI4000_DO_READ);
158         status = cvmx_twsi_read8(SPI4000_TWSI_ID(interface), SPI4000_GET_READ_STATUS);
166     status = cvmx_twsix_read_ia(0, SPI4000_TWSI_ID(interface), SPI4000_READ_DATA0, 4, 1, &data);
181  * @param interface Interface the SPI4000 is on. (0 or 1)
186 static void __cvmx_spi4000_mdio_write(int interface, int port, int location, int val)
202         __cvmx_spi4000_write(interface, 0x0681, val);
205     __cvmx_spi4000_write(interface, 0x0680, mdio.u32);
213  * @param interface Interface the SPI4000 is on. (0 or 1)
218 static int __cvmx_spi4000_mdio_read(int interface, int port, int location)
227     __cvmx_spi4000_write(interface, 0x0680, mdio.u32);
231         mdio.u32 = __cvmx_spi4000_read(interface, 0x0680);
234     return __cvmx_spi4000_read(interface, 0x0681) >> 16;
242 static void __cvmx_spi4000_configure_mac(int interface)
251     __cvmx_spi4000_write(interface, 0x0505, 0x3ff);  // reset all the MACs
252     __cvmx_spi4000_write(interface, 0x0620, 0x3ff);  // reset the TX FIFOs
257     __cvmx_spi4000_write(interface, 0x059e, 0x3ff);  // reset the RX FIFOs
261     __cvmx_spi4000_write(interface, 0x0505, 0x0);    // reset all the MACs
265     __cvmx_spi4000_write(interface, 0x0500, 0x0);    // disable all ports
268     //         Clock and interface mode Change En. address=Serdes base + 0x14
276         // Step 5: Set MAC interface mode GMII speed.
277         //         MAC interface mode and RGMII speed register.
281         __cvmx_spi4000_write(interface, port_offset | 0x0010, 0x3);
284         __cvmx_spi4000_write(interface, port_offset | 0x000f, 0x3fff);
302         __cvmx_spi4000_write(interface, port_offset | 0x0000, 0x0000);
304         __cvmx_spi4000_write(interface, port_offset | 0x0001, 0x0000);
318             __cvmx_spi4000_write(interface, port_offset | 0x0012, 0);
320             __cvmx_spi4000_write(interface, port_offset | 0x0012, 0x7);
323         __cvmx_spi4000_write(interface, port_offset | 0x0015, 0x1);
326         __cvmx_spi4000_write(interface, port_offset | 0x0018, 0x11cd); //??
329         __cvmx_spi4000_write(interface, port_offset | 0x0019, 0x00);
333     __cvmx_spi4000_write(interface, 0x059f, 0x03ff);
338         __cvmx_spi4000_write(interface, port + 0x0600, 0x0900); // TXFIFO High watermark
339         __cvmx_spi4000_write(interface, port + 0x060a, 0x0800); // TXFIFO Low watermark
340         __cvmx_spi4000_write(interface, port + 0x0614, 0x0380); // TXFIFO threshold
344     __cvmx_spi4000_write(interface, 0x059e, 0x0);    // reset the RX FIFOs
347     __cvmx_spi4000_write(interface, 0x0620, 0x0);    // reset the TX FIFOs
351     __cvmx_spi4000_write(interface, 0x0500, 0x03ff); // enable all ports
362 static void __cvmx_spi4000_configure_phy(int interface)
374         cvmx_spi4000_check_speed(interface, port);
377         __cvmx_spi4000_mdio_write(interface, port, 0x14, 0x00e2);
380         __cvmx_spi4000_mdio_write(interface, port, 0x4, 0x0d01);
383         __cvmx_spi4000_mdio_write(interface, port, 0x0, 0x9140);
390  * @param interface Interface the SPI4000 is on
394 cvmx_gmxx_rxx_rx_inbnd_t cvmx_spi4000_check_speed(int interface, int port)
402     if (!interface_is_spi4000[interface])
450     read_status = __cvmx_spi4000_mdio_read(interface, port, 0x11);
462                 __cvmx_spi4000_write(interface, (port<<7) | 0x0010, 0x3); /* 1Gbps */
464                 __cvmx_spi4000_write(interface, (port<<7) | 0x0010, 0x1); /* 100Mbps */
469             __cvmx_spi4000_write(interface, (port<<7) | 0x0010, 0x3); /* 1Gbps */
496  * Return non-zero if the SPI interface has a SPI4000 attached
498  * @param interface SPI interface the SPI4000 is connected to
502 int cvmx_spi4000_is_present(int interface)
508     if (cvmx_twsi_write8(SPI4000_TWSI_ID(interface), SPI4000_WRITE_ADDRESS_HIGH, 0))
510     if (cvmx_twsi_write8(SPI4000_TWSI_ID(interface), SPI4000_WRITE_ADDRESS_LOW, 0))
512     interface_is_spi4000[interface] = 1;
520  * @param interface SPI interface the SPI4000 is connected to
522 int cvmx_spi4000_initialize(int interface)
524     if (!cvmx_spi4000_is_present(interface))
527     __cvmx_spi4000_configure_mac(interface);
528     __cvmx_spi4000_configure_phy(interface);