contrib/octeon-sdk/cvmx-nand.c

998  * @param nand_address
1007 static inline cvmx_nand_status_t __cvmx_nand_build_pre_cmd(int chip, int cmd_data, int num_address_cycles, uint64_t nand_address, int cmd_data2)
1077             cmd.ale.adr_bytes_l = nand_address;
1078             cmd.ale.adr_bytes_h = nand_address >> 32;
1084             int column = nand_address & (cvmx_nand_state[chip].page_size-1);
1085             int row = nand_address >> column_bits;
1219  * @param nand_address
1230 static inline int __cvmx_nand_low_level_read(int chip, int nand_command1, int address_cycles, uint64_t nand_address, int nand_command2, uint64_t buffer_address, int buffer_length)
1240     CVMX_NAND_LOG_PARAM("0x%llx", (ULL)nand_address);
1257     if (__cvmx_nand_build_pre_cmd(chip, nand_command1, address_cycles, nand_address, nand_command2))
1317  * @param nand_address
1326 int cvmx_nand_page_read(int chip, uint64_t nand_address, uint64_t buffer_address, int buffer_length)
1332     CVMX_NAND_LOG_PARAM("0x%llx", (ULL)nand_address);
1351             nand_address = (nand_address & ~(cvmx_nand_state[chip].page_size - 1)) |  ((nand_address & (cvmx_nand_state[chip].page_size - 1)) >> 1);
1353     bytes = __cvmx_nand_low_level_read(chip, NAND_COMMAND_READ, __cvmx_nand_get_address_cycles(chip), nand_address, NAND_COMMAND_READ_FIN, buffer_address, buffer_length);
1366  * @param nand_address
1373 cvmx_nand_status_t cvmx_nand_page_write(int chip, uint64_t nand_address, uint64_t buffer_address)
1380     CVMX_NAND_LOG_PARAM("0x%llx", (ULL)nand_address);
1394             nand_address = (nand_address & ~(cvmx_nand_state[chip].page_size - 1)) |  ((nand_address & (cvmx_nand_state[chip].page_size - 1)) >> 1);
1406     if (__cvmx_nand_build_pre_cmd(chip, NAND_COMMAND_PROGRAM, __cvmx_nand_get_address_cycles(chip), nand_address, 0))
1455  * @param nand_address
1460 cvmx_nand_status_t cvmx_nand_block_erase(int chip, uint64_t nand_address)
1464     CVMX_NAND_LOG_PARAM("0x%llx", (ULL)nand_address);
1474                                   nand_address >> __cvmx_nand_get_column_bits(chip),
1516  * @param nand_address
1526 int cvmx_nand_read_id(int chip, uint64_t nand_address, uint64_t buffer_address, int buffer_length)
1532     CVMX_NAND_LOG_PARAM("0x%llx", (ULL)nand_address);
1545     bytes = __cvmx_nand_low_level_read(chip, NAND_COMMAND_READ_ID, 1, nand_address, 0, buffer_address, buffer_length);