Lines Matching refs:slave
35 * Note that the hardware is capable of running as both a master and a slave.
42 * must handle retries in a way that makes sense for the slave being addressed.
71 #define I2C_ADDR_REG 0x00 /* I2C slave address register */
79 #define I2CCR_MSTA (1 << 5) /* Master/slave mode */
85 #define I2CSR_MASS (1 << 6) /* Addressed as a slave */
319 i2c_repeated_start(device_t dev, u_char slave, int timeout)
332 * before writing slave address, wait for ack after write.
337 i2c_write_reg(sc, I2C_DATA_REG, slave);
343 i2c_start(device_t dev, u_char slave, int timeout)
359 i2c_write_reg(sc, I2C_DATA_REG, slave);