Lines Matching refs:pin

177 a10_gpio_get_function(struct a10_gpio_softc *sc, uint32_t pin)
184 if (pin > sc->padconf->npins)
186 bank = sc->padconf->pins[pin].port;
187 pin = sc->padconf->pins[pin].pin;
188 offset = ((pin & 0x07) << 2);
190 func = A10_GPIO_READ(sc, A10_GPIO_GP_CFG(bank, pin >> 3));
202 a10_gpio_set_function(struct a10_gpio_softc *sc, uint32_t pin, uint32_t f)
209 bank = sc->padconf->pins[pin].port;
210 pin = sc->padconf->pins[pin].pin;
211 offset = ((pin & 0x07) << 2);
213 data = A10_GPIO_READ(sc, A10_GPIO_GP_CFG(bank, pin >> 3));
216 A10_GPIO_WRITE(sc, A10_GPIO_GP_CFG(bank, pin >> 3), data);
220 a10_gpio_get_pud(struct a10_gpio_softc *sc, uint32_t pin)
227 bank = sc->padconf->pins[pin].port;
228 pin = sc->padconf->pins[pin].pin;
229 offset = ((pin & 0x0f) << 1);
231 val = A10_GPIO_READ(sc, A10_GPIO_GP_PUL(bank, pin >> 4));
243 a10_gpio_set_pud(struct a10_gpio_softc *sc, uint32_t pin, uint32_t state)
250 bank = sc->padconf->pins[pin].port;
251 pin = sc->padconf->pins[pin].pin;
252 offset = ((pin & 0x0f) << 1);
254 val = A10_GPIO_READ(sc, A10_GPIO_GP_PUL(bank, pin >> 4));
257 A10_GPIO_WRITE(sc, A10_GPIO_GP_PUL(bank, pin >> 4), val);
261 a10_gpio_set_drv(struct a10_gpio_softc *sc, uint32_t pin, uint32_t drive)
268 bank = sc->padconf->pins[pin].port;
269 pin = sc->padconf->pins[pin].pin;
270 offset = ((pin & 0x0f) << 1);
272 val = A10_GPIO_READ(sc, A10_GPIO_GP_DRV(bank, pin >> 4));
275 A10_GPIO_WRITE(sc, A10_GPIO_GP_DRV(bank, pin >> 4), val);
279 a10_gpio_pin_configure(struct a10_gpio_softc *sc, uint32_t pin, uint32_t flags)
288 a10_gpio_set_function(sc, pin, A10_GPIO_OUTPUT);
290 a10_gpio_set_function(sc, pin, A10_GPIO_INPUT);
296 a10_gpio_set_pud(sc, pin, A10_GPIO_PULLUP);
298 a10_gpio_set_pud(sc, pin, A10_GPIO_PULLDOWN);
300 a10_gpio_set_pud(sc, pin, A10_GPIO_NONE);
325 a10_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
330 if (pin >= sc->padconf->npins)
339 a10_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
344 if (pin >= sc->padconf->npins)
348 *flags = a10_gpio_get_function(sc, pin);
349 *flags |= a10_gpio_get_pud(sc, pin);
356 a10_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
361 if (pin >= sc->padconf->npins)
365 sc->padconf->pins[pin].name);
372 a10_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
377 if (pin > sc->padconf->npins)
381 a10_gpio_pin_configure(sc, pin, flags);
388 a10_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
394 if (pin > sc->padconf->npins)
397 bank = sc->padconf->pins[pin].port;
398 pin = sc->padconf->pins[pin].pin;
403 data |= (1 << pin);
405 data &= ~(1 << pin);
413 a10_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
419 if (pin > sc->padconf->npins)
422 bank = sc->padconf->pins[pin].port;
423 pin = sc->padconf->pins[pin].pin;
428 *val = (reg_data & (1 << pin)) ? 1 : 0;
434 a10_gpio_pin_toggle(device_t dev, uint32_t pin)
440 if (pin > sc->padconf->npins)
443 bank = sc->padconf->pins[pin].port;
444 pin = sc->padconf->pins[pin].pin;
448 if (data & (1 << pin))
449 data &= ~(1 << pin);
451 data |= (1 << pin);
471 aw_find_pin_func(struct a10_gpio_softc *sc, int pin, const char *func)
476 if (sc->padconf->pins[pin].functions[i] &&
477 !strcmp(func, sc->padconf->pins[pin].functions[i]))
518 /* Configure each pin to the correct function, drive and pull */
597 /* Use the right pin data for the current SoC */
656 pcell_t *gpios, uint32_t *pin, uint32_t *flags)
663 /* The GPIO pins are mapped as: <gpio-phandle bank pin flags>. */
666 sc->padconf->pins[i].pin == gpios[1]) {
667 *pin = i;