Lines Matching defs:mask
74 uint8_t mask; /* Interrupt Mask Register (IMR) */
75 uint8_t smm; /* special mask mode */
139 if (atpic->smm && (atpic->mask & bit) != 0)
165 * In 'Special Mask Mode', when a mask bit is set in OCW1 it inhibits
187 if ((atpic->request & bit) != 0 && (atpic->mask & bit) == 0)
210 atpic->mask, atpic->request, atpic->service);
221 atpic->mask, atpic->request, atpic->service);
232 atpic->mask, atpic->request, atpic->service);
265 atpic->mask, atpic->request, atpic->service);
278 atpic->mask = 0;
354 atpic->mask = val & 0xff;
398 VATPIC_CTR2(vatpic, "%s atpic special mask mode %s",
643 /* read interrrupt mask register */
644 *eax = atpic->mask;