Lines Matching refs:BIT
34 #define BIT(n) (1ULL << n)
49 #define VMCB_INTCPT_INTR BIT(0)
50 #define VMCB_INTCPT_NMI BIT(1)
51 #define VMCB_INTCPT_SMI BIT(2)
52 #define VMCB_INTCPT_INIT BIT(3)
53 #define VMCB_INTCPT_VINTR BIT(4)
54 #define VMCB_INTCPT_CR0_WRITE BIT(5)
55 #define VMCB_INTCPT_IDTR_READ BIT(6)
56 #define VMCB_INTCPT_GDTR_READ BIT(7)
57 #define VMCB_INTCPT_LDTR_READ BIT(8)
58 #define VMCB_INTCPT_TR_READ BIT(9)
59 #define VMCB_INTCPT_IDTR_WRITE BIT(10)
60 #define VMCB_INTCPT_GDTR_WRITE BIT(11)
61 #define VMCB_INTCPT_LDTR_WRITE BIT(12)
62 #define VMCB_INTCPT_TR_WRITE BIT(13)
63 #define VMCB_INTCPT_RDTSC BIT(14)
64 #define VMCB_INTCPT_RDPMC BIT(15)
65 #define VMCB_INTCPT_PUSHF BIT(16)
66 #define VMCB_INTCPT_POPF BIT(17)
67 #define VMCB_INTCPT_CPUID BIT(18)
68 #define VMCB_INTCPT_RSM BIT(19)
69 #define VMCB_INTCPT_IRET BIT(20)
70 #define VMCB_INTCPT_INTn BIT(21)
71 #define VMCB_INTCPT_INVD BIT(22)
72 #define VMCB_INTCPT_PAUSE BIT(23)
73 #define VMCB_INTCPT_HLT BIT(24)
74 #define VMCB_INTCPT_INVPG BIT(25)
75 #define VMCB_INTCPT_INVPGA BIT(26)
76 #define VMCB_INTCPT_IO BIT(27)
77 #define VMCB_INTCPT_MSR BIT(28)
78 #define VMCB_INTCPT_TASK_SWITCH BIT(29)
79 #define VMCB_INTCPT_FERR_FREEZE BIT(30)
80 #define VMCB_INTCPT_SHUTDOWN BIT(31)
83 #define VMCB_INTCPT_VMRUN BIT(0)
84 #define VMCB_INTCPT_VMMCALL BIT(1)
85 #define VMCB_INTCPT_VMLOAD BIT(2)
86 #define VMCB_INTCPT_VMSAVE BIT(3)
87 #define VMCB_INTCPT_STGI BIT(4)
88 #define VMCB_INTCPT_CLGI BIT(5)
89 #define VMCB_INTCPT_SKINIT BIT(6)
90 #define VMCB_INTCPT_RDTSCP BIT(7)
91 #define VMCB_INTCPT_ICEBP BIT(8)
92 #define VMCB_INTCPT_WBINVD BIT(9)
93 #define VMCB_INTCPT_MONITOR BIT(10)
94 #define VMCB_INTCPT_MWAIT BIT(11)
95 #define VMCB_INTCPT_MWAIT_ARMED BIT(12)
96 #define VMCB_INTCPT_XSETBV BIT(13)
106 #define VMCB_CACHE_I BIT(0) /* Intercept, TSC off, Pause filter */
107 #define VMCB_CACHE_IOPM BIT(1) /* I/O and MSR permission */
108 #define VMCB_CACHE_ASID BIT(2) /* ASID */
109 #define VMCB_CACHE_TPR BIT(3) /* V_TPR to V_INTR_VECTOR */
110 #define VMCB_CACHE_NP BIT(4) /* Nested Paging */
111 #define VMCB_CACHE_CR BIT(5) /* CR0, CR3, CR4 & EFER */
112 #define VMCB_CACHE_DR BIT(6) /* Debug registers */
113 #define VMCB_CACHE_DT BIT(7) /* GDT/IDT */
114 #define VMCB_CACHE_SEG BIT(8) /* User segments, CPL */
115 #define VMCB_CACHE_CR2 BIT(9) /* page fault address */
116 #define VMCB_CACHE_LBR BIT(10) /* Last branch */
119 #define VMCB_EVENTINJ_EC_VALID BIT(11) /* Error Code valid */
120 #define VMCB_EVENTINJ_VALID BIT(31) /* Event valid */
152 #define VMCB_NPF_INFO1_P BIT(0) /* Nested page present. */
153 #define VMCB_NPF_INFO1_W BIT(1) /* Access was write. */
154 #define VMCB_NPF_INFO1_U BIT(2) /* Access was user access. */
155 #define VMCB_NPF_INFO1_RSV BIT(3) /* Reserved bits present. */
156 #define VMCB_NPF_INFO1_ID BIT(4) /* Code read. */
158 #define VMCB_NPF_INFO1_GPA BIT(32) /* Guest physical address. */
159 #define VMCB_NPF_INFO1_GPT BIT(33) /* Guest page table. */
167 #define VMCB_EXITINTINFO_EC_VALID(x) (((x) & BIT(11)) ? 1 : 0)
168 #define VMCB_EXITINTINFO_VALID(x) (((x) & BIT(31)) ? 1 : 0)
220 #define VMCB_CS_ATTRIB_L BIT(9) /* Long mode. */
221 #define VMCB_CS_ATTRIB_D BIT(10) /* OPerand size bit. */