Lines Matching refs:uc_mcontext
128 uc->uc_mcontext.__gregs[_REG_PS] &= ~ALPHA_PSL_USERMODE;
131 uc->uc_mcontext.__gregs[_REG_PS] |= ALPHA_PSL_IPL_HIGH;
136 uc->uc_mcontext.__gregs[_REG_RFLAGS] |= PSL_MBZ;
143 uc->uc_mcontext.__gregs[_REG_RIP] = VM_MAXUSER_ADDRESS;
148 uc->uc_mcontext.__gregs[_REG_PC] |= 0x1f /*PSR_SYS32_MODE*/;
149 uc->uc_mcontext.__gregs[_REG_CPSR] |= 0x03 /*R15_MODE_SVC*/;
154 uc->uc_mcontext.__gregs[_REG_PSW] |= PSW_MBZ;
157 uc->uc_mcontext.__gregs[_REG_PSW] &= ~PSW_MBS;
162 uc->uc_mcontext.__gregs[_REG_EFL] |= PSL_IOPL;
165 uc->uc_mcontext.__gregs[_REG_CS] &= ~SEL_RPL;
171 uc->uc_mcontext.__gregs[_REG_PS] |= (PSL_MBZ|PSL_IPL|PSL_S);
177 uc->uc_mcontext.__gregs[_REG_SR] |= PSL_MD;
182 uc->uc_mcontext.__gregs[_REG_PC] = 0x100002;
185 uc->uc_mcontext.__gregs[_REG_nPC] = 0x100002;
188 uc->uc_mcontext.__gregs[_REG_PC] = 0;
191 uc->uc_mcontext.__gregs[_REG_nPC] = 0;
196 uc->uc_mcontext.__gregs[_REG_PSL] &= ~(PSL_U | PSL_PREVU);
199 uc->uc_mcontext.__gregs[_REG_PSL] |= PSL_IPL | PSL_IS;
202 uc->uc_mcontext.__gregs[_REG_PSL] |= PSL_CM;