Lines Matching refs:SchedClass
36 // Each processor has a SchedClassDesc table with an entry for each SchedClass.
803 // Generate the SchedClass table for this processor and update global
826 // A Variant SchedClass has no resources of its own.
847 // Determine if the SchedClass is actually reachable on this processor. If
965 // Create an entry for each operand Read in this SchedClass.
1003 // Add the information for this SchedClass to the global tables using basic
1061 // Emit SchedClass tables for all processors and associated global tables.
1113 // Emit a SchedClass table for each processor.
1137 const CodeGenSchedClass &SchedClass = SchedModels.getSchedClass(SCIdx);
1138 OS << " {DBGFIELD(\"" << SchedClass.Name << "\") ";
1139 if (SchedClass.Name.size() < 18)
1140 OS.indent(18 - SchedClass.Name.size());
1280 << "\n::resolveSchedClass(unsigned SchedClass, const MachineInstr *MI,"
1297 OS << " switch (SchedClass) {\n";
1347 OS << " report_fatal_error(\"Expected a variant SchedClass\");\n"
1481 << " unsigned resolveSchedClass(unsigned SchedClass, "