Lines Matching refs:RegUses
207 // Update RegUses. The data structure is not optimized for this purpose;
298 const RegUseTracker &RegUses) const;
456 const RegUseTracker &RegUses) const {
458 if (RegUses.isRegUsedByUsesOtherThan(ScaledReg, LUIdx))
461 if (RegUses.isRegUsedByUsesOtherThan(BaseReg, LUIdx))
1318 /// Recompute the Regs field, and update RegUses.
1319 void LSRUse::RecomputeRegs(size_t LUIdx, RegUseTracker &RegUses) {
1331 RegUses.dropRegister(S, LUIdx);
1669 RegUseTracker RegUses;
2314 // Update RegUses.
2315 RegUses.swapAndDropUse(LUIdx, Uses.size());
3059 /// Note which registers are used by the given formula, updating RegUses.
3062 RegUses.countRegister(F.ScaledReg, LUIdx);
3064 RegUses.countRegister(BaseReg, LUIdx);
3087 SmallVector<const SCEV *, 8> Worklist(RegUses.begin(), RegUses.end());
3626 if (!F.hasRegsUsedByUsesOtherThan(LUIdx, RegUses))
3671 for (const SCEV *Use : RegUses) {
3678 UsedByIndicesMap[Reg] |= RegUses.getUsedByIndices(Use);
3704 const SmallBitVector &UsedByIndices = RegUses.getUsedByIndices(OrigReg);
3909 if (RegUses.isRegUsedByUsesOtherThan(Reg, LUIdx))
3913 RegUses.isRegUsedByUsesOtherThan(F.ScaledReg, LUIdx))
3948 LU.RecomputeRegs(LUIdx, RegUses);
4037 LU.RecomputeRegs(LUIdx, RegUses);
4110 LUThatHas->RecomputeRegs(LUThatHas - &Uses.front(), RegUses);
4156 for (const SCEV *Reg : RegUses) {
4162 unsigned Count = RegUses.getUsedByIndices(Reg).count();
4195 LU.RecomputeRegs(LUIdx, RegUses);
4872 RegUses.clear();