Target/X86/X86ISelLowering.cpp

7047   SDValue VMask = DAG.getNode(ISD::BUILD_VECTOR, DL, VT, VMaskOps);
7050                   DL, VT, V, VMask);
8388       SmallVectorImpl<int> &VMask = (UnpackIdx % 2 == 0) ? V1Mask : V2Mask;
8389       VMask[(UnpackIdx / 2) * Scale + i % Scale + (UnpackLo ? 0 : Size / 2)] =
16381   SDValue VMask = getMaskNode(Mask, MaskVT, Subtarget, DAG, dl);
16389     return DAG.getNode(ISD::AND, dl, VT, Op, VMask);
16392     return DAG.getNode(ISD::OR, dl, VT, Op, VMask);
16404   return DAG.getNode(OpcodeSelect, dl, VT, VMask, Op, PreservedSrc);
16947       SDValue VMask = getMaskNode(Mask, MaskVT, Subtarget, DAG, dl);
16948       return DAG.getNode(IntrData->Opc0, dl, VT, VMask, Op.getOperand(1),
16978       SDValue VMask = getMaskNode(Mask, MaskVT, Subtarget, DAG, dl);
16979       return DAG.getNode(IntrData->Opc0, dl, VT, VMask);
17216   SDValue VMask = getMaskNode(Mask, MaskVT, Subtarget, DAG, dl);
17222   SDValue Ops[] = {Src, VMask, Base, Scale, Index, Disp, Segment, Chain};
17240   SDValue VMask = getMaskNode(Mask, MaskVT, &Subtarget, DAG, dl);
17242   SDValue Ops[] = {Base, Scale, Index, Disp, Segment, VMask, Src, Chain};
17258   SDValue VMask = getMaskNode(Mask, MaskVT, &Subtarget, DAG, dl);
17260   SDValue Ops[] = {VMask, Base, Scale, Index, Disp, Segment, Chain};
17415   SDValue VMask = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MaskVT,
17425                             VMask, SVT, MMO, true);
17612     SDValue VMask = getMaskNode(Mask, MaskVT, Subtarget, DAG, dl);
17613     return DAG.getMaskedLoad(VT, dl, Chain, Addr, VMask, PassThru, VT,
23545   SmallVector<int, 4> VMask = getPSHUFShuffleMask(V);
23547     M = VMask[M];
23633   SmallVector<int, 4> VMask = getPSHUFShuffleMask(V);
23635     M = VMask[M];
23773         SmallVector<int, 4> VMask = getPSHUFShuffleMask(V);
23780           WordMask[i + VOffset] = VMask[i] + VOffset;