Lines Matching refs:Out

188                                     MCStreamer &Out) override {
189 InstrumentMOVS(Inst, Operands, Ctx, MII, Out);
191 EmitInstruction(Out, MCInstBuilder(X86::REP_PREFIX));
193 InstrumentMOV(Inst, Operands, Ctx, MII, Out);
197 EmitInstruction(Out, Inst);
203 MCStreamer &Out) = 0;
208 MCStreamer &Out) = 0;
213 MCContext &Ctx, MCStreamer &Out) = 0;
217 MCContext &Ctx, MCStreamer &Out) = 0;
220 MCStreamer &Out) = 0;
224 MCStreamer &Out);
226 unsigned AccessSize, MCContext &Ctx, MCStreamer &Out);
229 MCContext &Ctx, const MCInstrInfo &MII, MCStreamer &Out);
231 MCContext &Ctx, const MCInstrInfo &MII, MCStreamer &Out);
234 void EmitLabel(MCStreamer &Out, MCSymbol *Label) { Out.EmitLabel(Label); }
236 void EmitLEA(X86Operand &Op, unsigned Size, unsigned Reg, MCStreamer &Out) {
242 EmitInstruction(Out, Inst);
246 unsigned Reg, MCContext &Ctx, MCStreamer &Out);
281 const RegisterContext &RegCtx, MCContext &Ctx, MCStreamer &Out) {
287 InstrumentMemOperandSmall(Op, AccessSize, IsWrite, RegCtx, Ctx, Out);
289 InstrumentMemOperandLarge(Op, AccessSize, IsWrite, RegCtx, Ctx, Out);
295 MCContext &Ctx, MCStreamer &Out) {
306 InstrumentMemOperandPrologue(RegCtx, Ctx, Out);
314 Out);
324 Out);
332 InstrumentMemOperand(*Op, AccessSize, true /* IsWrite */, RegCtx, Ctx, Out);
341 InstrumentMemOperand(*Op, AccessSize, true /* IsWrite */, RegCtx, Ctx, Out);
344 InstrumentMemOperandEpilogue(RegCtx, Ctx, Out);
350 MCStreamer &Out) {
371 InstrumentMOVSImpl(AccessSize, Ctx, Out);
377 MCStreamer &Out) {
424 InstrumentMemOperandPrologue(RegCtx, Ctx, Out);
425 InstrumentMemOperand(MemOp, AccessSize, IsWrite, RegCtx, Ctx, Out);
426 InstrumentMemOperandEpilogue(RegCtx, Ctx, Out);
434 MCStreamer &Out) {
445 EmitLEA(Op, Size, Reg, Out);
452 EmitLEA(*NewOp, Size, Reg, Out);
460 EmitLEA(*DispOp, Size, Reg, Out);
503 unsigned GetFrameReg(const MCContext &Ctx, MCStreamer &Out) {
504 unsigned FrameReg = GetFrameRegGeneric(Ctx, Out);
510 void SpillReg(MCStreamer &Out, unsigned Reg) {
511 EmitInstruction(Out, MCInstBuilder(X86::PUSH32r).addReg(Reg));
515 void RestoreReg(MCStreamer &Out, unsigned Reg) {
516 EmitInstruction(Out, MCInstBuilder(X86::POP32r).addReg(Reg));
520 void StoreFlags(MCStreamer &Out) {
521 EmitInstruction(Out, MCInstBuilder(X86::PUSHF32));
525 void RestoreFlags(MCStreamer &Out) {
526 EmitInstruction(Out, MCInstBuilder(X86::POPF32));
532 MCStreamer &Out) override {
537 unsigned FrameReg = GetFrameReg(Ctx, Out);
539 SpillReg(Out, LocalFrameReg);
541 Out.EmitCFIAdjustCfaOffset(4 /* byte size of the LocalFrameReg */);
542 Out.EmitCFIRelOffset(
546 Out,
548 Out.EmitCFIRememberState();
549 Out.EmitCFIDefCfaRegister(
553 SpillReg(Out, RegCtx.AddressReg(32));
554 SpillReg(Out, RegCtx.ShadowReg(32));
556 SpillReg(Out, RegCtx.ScratchReg(32));
557 StoreFlags(Out);
562 MCStreamer &Out) override {
566 RestoreFlags(Out);
568 RestoreReg(Out, RegCtx.ScratchReg(32));
569 RestoreReg(Out, RegCtx.ShadowReg(32));
570 RestoreReg(Out, RegCtx.AddressReg(32));
572 unsigned FrameReg = GetFrameReg(Ctx, Out);
574 RestoreReg(Out, LocalFrameReg);
575 Out.EmitCFIRestoreState();
577 Out.EmitCFIAdjustCfaOffset(-4 /* byte size of the LocalFrameReg */);
585 MCStreamer &Out) override;
590 MCStreamer &Out) override;
592 MCStreamer &Out) override;
596 MCStreamer &Out, const RegisterContext &RegCtx) {
597 EmitInstruction(Out, MCInstBuilder(X86::CLD));
598 EmitInstruction(Out, MCInstBuilder(X86::MMX_EMMS));
600 EmitInstruction(Out, MCInstBuilder(X86::AND64ri8)
605 Out, MCInstBuilder(X86::PUSH32r).addReg(RegCtx.AddressReg(32)));
612 EmitInstruction(Out, MCInstBuilder(X86::CALLpcrel32).addExpr(FnExpr));
618 const RegisterContext &RegCtx, MCContext &Ctx, MCStreamer &Out) {
626 ComputeMemOperandAddress(Op, 32, AddressRegI32, Ctx, Out);
628 EmitInstruction(Out, MCInstBuilder(X86::MOV32rr).addReg(ShadowRegI32).addReg(
630 EmitInstruction(Out, MCInstBuilder(X86::SHR32ri)
644 EmitInstruction(Out, Inst);
648 Out, MCInstBuilder(X86::TEST8rr).addReg(ShadowRegI8).addReg(ShadowRegI8));
651 EmitInstruction(Out, MCInstBuilder(X86::JE_1).addExpr(DoneExpr));
653 EmitInstruction(Out, MCInstBuilder(X86::MOV32rr).addReg(ScratchRegI32).addReg(
655 EmitInstruction(Out, MCInstBuilder(X86::AND32ri)
669 EmitLEA(*Op, 32, ScratchRegI32, Out);
673 EmitInstruction(Out, MCInstBuilder(X86::ADD32ri8)
681 Out,
683 EmitInstruction(Out, MCInstBuilder(X86::CMP32rr).addReg(ScratchRegI32).addReg(
685 EmitInstruction(Out, MCInstBuilder(X86::JL_1).addExpr(DoneExpr));
687 EmitCallAsanReport(AccessSize, IsWrite, Ctx, Out, RegCtx);
688 EmitLabel(Out, DoneSym);
693 const RegisterContext &RegCtx, MCContext &Ctx, MCStreamer &Out) {
697 ComputeMemOperandAddress(Op, 32, AddressRegI32, Ctx, Out);
699 EmitInstruction(Out, MCInstBuilder(X86::MOV32rr).addReg(ShadowRegI32).addReg(
701 EmitInstruction(Out, MCInstBuilder(X86::SHR32ri)
722 EmitInstruction(Out, Inst);
726 EmitInstruction(Out, MCInstBuilder(X86::JE_1).addExpr(DoneExpr));
728 EmitCallAsanReport(AccessSize, IsWrite, Ctx, Out, RegCtx);
729 EmitLabel(Out, DoneSym);
734 MCStreamer &Out) {
735 StoreFlags(Out);
741 Out, MCInstBuilder(X86::TEST32rr).addReg(X86::ECX).addReg(X86::ECX));
742 EmitInstruction(Out, MCInstBuilder(X86::JE_1).addExpr(DoneExpr));
746 X86::ECX /* CntReg */, AccessSize, Ctx, Out);
748 EmitLabel(Out, DoneSym);
749 RestoreFlags(Out);
761 unsigned GetFrameReg(const MCContext &Ctx, MCStreamer &Out) {
762 unsigned FrameReg = GetFrameRegGeneric(Ctx, Out);
768 void SpillReg(MCStreamer &Out, unsigned Reg) {
769 EmitInstruction(Out, MCInstBuilder(X86::PUSH64r).addReg(Reg));
773 void RestoreReg(MCStreamer &Out, unsigned Reg) {
774 EmitInstruction(Out, MCInstBuilder(X86::POP64r).addReg(Reg));
778 void StoreFlags(MCStreamer &Out) {
779 EmitInstruction(Out, MCInstBuilder(X86::PUSHF64));
783 void RestoreFlags(MCStreamer &Out) {
784 EmitInstruction(Out, MCInstBuilder(X86::POPF64));
790 MCStreamer &Out) override {
795 unsigned FrameReg = GetFrameReg(Ctx, Out);
797 SpillReg(Out, X86::RBP);
799 Out.EmitCFIAdjustCfaOffset(8 /* byte size of the LocalFrameReg */);
800 Out.EmitCFIRelOffset(
804 Out,
806 Out.EmitCFIRememberState();
807 Out.EmitCFIDefCfaRegister(
811 EmitAdjustRSP(Ctx, Out, -128);
812 SpillReg(Out, RegCtx.ShadowReg(64));
813 SpillReg(Out, RegCtx.AddressReg(64));
815 SpillReg(Out, RegCtx.ScratchReg(64));
816 StoreFlags(Out);
821 MCStreamer &Out) override {
825 RestoreFlags(Out);
827 RestoreReg(Out, RegCtx.ScratchReg(64));
828 RestoreReg(Out, RegCtx.AddressReg(64));
829 RestoreReg(Out, RegCtx.ShadowReg(64));
830 EmitAdjustRSP(Ctx, Out, 128);
832 unsigned FrameReg = GetFrameReg(Ctx, Out);
834 RestoreReg(Out, LocalFrameReg);
835 Out.EmitCFIRestoreState();
837 Out.EmitCFIAdjustCfaOffset(-8 /* byte size of the LocalFrameReg */);
845 MCStreamer &Out) override;
850 MCStreamer &Out) override;
852 MCStreamer &Out) override;
855 void EmitAdjustRSP(MCContext &Ctx, MCStreamer &Out, long Offset) {
860 EmitLEA(*Op, 64, X86::RSP, Out);
865 MCStreamer &Out, const RegisterContext &RegCtx) {
866 EmitInstruction(Out, MCInstBuilder(X86::CLD));
867 EmitInstruction(Out, MCInstBuilder(X86::MMX_EMMS));
869 EmitInstruction(Out, MCInstBuilder(X86::AND64ri8)
875 EmitInstruction(Out, MCInstBuilder(X86::MOV64rr).addReg(X86::RDI).addReg(
883 EmitInstruction(Out, MCInstBuilder(X86::CALL64pcrel32).addExpr(FnExpr));
889 const RegisterContext &RegCtx, MCContext &Ctx, MCStreamer &Out) {
899 ComputeMemOperandAddress(Op, 64, AddressRegI64, Ctx, Out);
901 EmitInstruction(Out, MCInstBuilder(X86::MOV64rr).addReg(ShadowRegI64).addReg(
903 EmitInstruction(Out, MCInstBuilder(X86::SHR64ri)
916 EmitInstruction(Out, Inst);
920 Out, MCInstBuilder(X86::TEST8rr).addReg(ShadowRegI8).addReg(ShadowRegI8));
923 EmitInstruction(Out, MCInstBuilder(X86::JE_1).addExpr(DoneExpr));
925 EmitInstruction(Out, MCInstBuilder(X86::MOV32rr).addReg(ScratchRegI32).addReg(
927 EmitInstruction(Out, MCInstBuilder(X86::AND32ri)
941 EmitLEA(*Op, 32, ScratchRegI32, Out);
945 EmitInstruction(Out, MCInstBuilder(X86::ADD32ri8)
953 Out,
955 EmitInstruction(Out, MCInstBuilder(X86::CMP32rr).addReg(ScratchRegI32).addReg(
957 EmitInstruction(Out, MCInstBuilder(X86::JL_1).addExpr(DoneExpr));
959 EmitCallAsanReport(AccessSize, IsWrite, Ctx, Out, RegCtx);
960 EmitLabel(Out, DoneSym);
965 const RegisterContext &RegCtx, MCContext &Ctx, MCStreamer &Out) {
969 ComputeMemOperandAddress(Op, 64, AddressRegI64, Ctx, Out);
971 EmitInstruction(Out, MCInstBuilder(X86::MOV64rr).addReg(ShadowRegI64).addReg(
973 EmitInstruction(Out, MCInstBuilder(X86::SHR64ri)
994 EmitInstruction(Out, Inst);
999 EmitInstruction(Out, MCInstBuilder(X86::JE_1).addExpr(DoneExpr));
1001 EmitCallAsanReport(AccessSize, IsWrite, Ctx, Out, RegCtx);
1002 EmitLabel(Out, DoneSym);
1007 MCStreamer &Out) {
1008 StoreFlags(Out);
1014 Out, MCInstBuilder(X86::TEST64rr).addReg(X86::RCX).addReg(X86::RCX));
1015 EmitInstruction(Out, MCInstBuilder(X86::JE_1).addExpr(DoneExpr));
1019 X86::RCX /* CntReg */, AccessSize, Ctx, Out);
1021 EmitLabel(Out, DoneSym);
1022 RestoreFlags(Out);
1034 const MCInstrInfo &MII, MCStreamer &Out) {
1035 EmitInstruction(Out, Inst);
1038 void X86AsmInstrumentation::EmitInstruction(MCStreamer &Out,
1040 Out.EmitInstruction(Inst, *STI);
1044 MCStreamer &Out) {
1045 if (!Out.getNumFrameInfos()) // No active dwarf frame
1047 const MCDwarfFrameInfo &Frame = Out.getDwarfFrameInfos().back();