Target/Sparc/SparcRegisterInfo.cpp

37 SparcRegisterInfo::SparcRegisterInfo() : SparcGenRegisterInfo(SP::O7) {}
59   Reserved.set(SP::G1);
63     Reserved.set(SP::G2);
64     Reserved.set(SP::G3);
65     Reserved.set(SP::G4);
69     Reserved.set(SP::G5);
71   Reserved.set(SP::O6);
72   Reserved.set(SP::I6);
73   Reserved.set(SP::I7);
74   Reserved.set(SP::G0);
75   Reserved.set(SP::G6);
76   Reserved.set(SP::G7);
80   Reserved.set(SP::G0_G1);
82     Reserved.set(SP::G2_G3);
84     Reserved.set(SP::G4_G5);
86   Reserved.set(SP::O6_O7);
87   Reserved.set(SP::I6_I7);
88   Reserved.set(SP::G6_G7);
93       for (MCRegAliasIterator AI(SP::D16 + n, this, true); AI.isValid(); ++AI)
105   return Subtarget.is64Bit() ? &SP::I64RegsRegClass : &SP::IntRegsRegClass;
133     BuildMI(*MI.getParent(), II, dl, TII.get(SP::SETHIi), SP::G1)
138     BuildMI(*MI.getParent(), II, dl, TII.get(SP::ADDrr), SP::G1).addReg(SP::G1)
141     MI.getOperand(FIOperandNum).ChangeToRegister(SP::G1, false);
151   BuildMI(*MI.getParent(), II, dl, TII.get(SP::SETHIi), SP::G1)
153   BuildMI(*MI.getParent(), II, dl, TII.get(SP::XORri), SP::G1)
154     .addReg(SP::G1).addImm(LOX10(Offset));
156   BuildMI(*MI.getParent(), II, dl, TII.get(SP::ADDrr), SP::G1).addReg(SP::G1)
159   MI.getOperand(FIOperandNum).ChangeToRegister(SP::G1, false);
184     if (MI.getOpcode() == SP::STQFri) {
187       unsigned SrcEvenReg = getSubReg(SrcReg, SP::sub_even64);
188       unsigned SrcOddReg  = getSubReg(SrcReg, SP::sub_odd64);
190         BuildMI(*MI.getParent(), II, dl, TII.get(SP::STDFri))
193       MI.setDesc(TII.get(SP::STDFri));
196     } else if (MI.getOpcode() == SP::LDQFri) {
199       unsigned DestEvenReg = getSubReg(DestReg, SP::sub_even64);
200       unsigned DestOddReg  = getSubReg(DestReg, SP::sub_odd64);
202         BuildMI(*MI.getParent(), II, dl, TII.get(SP::LDDFri), DestEvenReg)
206       MI.setDesc(TII.get(SP::LDDFri));
217   return SP::I6;
233   // If there's a reserved call frame, we can use SP to access locals.