Lines Matching refs:SP
115 CallInst.setOpcode(SP::CALL);
125 SETHIInst.setOpcode(SP::SETHIi);
146 EmitBinary(OutStreamer, SP::ORri, RS1, Imm, RD, STI);
152 EmitBinary(OutStreamer, SP::ADDrr, RS1, RS2, RD, STI);
158 EmitBinary(OutStreamer, SP::SLLri, RS1, Imm, RD, STI);
182 assert(MO.getReg() != SP::O7 &&
218 MCOperand RegO7 = MCOperand::createReg(SP::O7);
232 MCOperand RegO7 = MCOperand::createReg(SP::O7);
266 case SP::GETPCX:
284 const unsigned globalRegs[] = { SP::G2, SP::G3, SP::G6, SP::G7, 0 };
290 if (reg == SP::G6 || reg == SP::G7)
306 if (MI->getOpcode() == SP::CALL)
309 else if (MI->getOpcode() == SP::SETHIi || MI->getOpcode() == SP::SETHIXi)
319 else if (MI->getOpcode() == SP::TLS_CALL)
324 else if (MI->getOpcode() == SP::TLS_ADDrr)
330 else if (MI->getOpcode() == SP::TLS_LDrr)
333 else if (MI->getOpcode() == SP::TLS_LDXrr)
336 else if (MI->getOpcode() == SP::XORri || MI->getOpcode() == SP::XORXri)
397 MI->getOperand(opNum+1).getReg() == SP::G0)