Lines Matching refs:Reg1
791 unsigned Opcode, unsigned Reg1,
800 unsigned Temp = Reg1;
801 Reg1 = Reg2;
805 I.addOperand(MCOperand::createReg(Reg1));
811 unsigned Opcode, unsigned Reg1,
815 I.addOperand(MCOperand::createReg(Reg1));
822 unsigned MovOpc, unsigned Reg1,
826 unsigned temp = Reg1;
827 Reg1 = Reg2;
830 EmitInstrRegReg(STI, MovOpc, Reg1, FPReg1);