Lines Matching refs:HexagonTargetLowering

508 void HexagonTargetLowering::promoteLdStType(EVT VT, EVT PromotedLdStVT) {
521 HexagonTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG)
557 HexagonTargetLowering::LowerReturn(SDValue Chain,
596 bool HexagonTargetLowering::mayBeEmittedAsTailCall(CallInst *CI) const {
612 HexagonTargetLowering::LowerCallResult(SDValue Chain, SDValue InFlag,
644 HexagonTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
906 bool HexagonTargetLowering::getPostIndexedAddressParts(SDNode *N, SDNode *Op,
944 HexagonTargetLowering::LowerINLINEASM(SDValue Op, SelectionDAG &DAG) const {
994 HexagonTargetLowering::LowerDYNAMIC_STACKALLOC(SDValue Op,
1025 HexagonTargetLowering::LowerFormalArguments(SDValue Chain,
1170 HexagonTargetLowering::LowerVASTART(SDValue Op, SelectionDAG &DAG) const {
1204 SDValue HexagonTargetLowering::LowerCTPOP(SDValue Op, SelectionDAG &DAG) const {
1215 SDValue HexagonTargetLowering::LowerSETCC(SDValue Op, SelectionDAG &DAG) const {
1265 HexagonTargetLowering::LowerVSELECT(SDValue Op, SelectionDAG &DAG) const {
1283 SDValue HexagonTargetLowering::LowerLOAD(SDValue Op, SelectionDAG &DAG) const {
1369 HexagonTargetLowering::LowerConstantPool(SDValue Op, SelectionDAG &DAG) const {
1387 HexagonTargetLowering::LowerJumpTable(SDValue Op, SelectionDAG &DAG) const {
1401 HexagonTargetLowering::LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const {
1427 HexagonTargetLowering::LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const {
1445 HexagonTargetLowering::LowerATOMIC_FENCE(SDValue Op, SelectionDAG& DAG) const {
1452 HexagonTargetLowering::LowerGLOBALADDRESS(SDValue Op, SelectionDAG &DAG) const {
1486 HexagonTargetLowering::LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const {
1502 HexagonTargetLowering::LowerGLOBAL_OFFSET_TABLE(SDValue Op, SelectionDAG &DAG)
1514 HexagonTargetLowering::HexagonTargetLowering(const TargetMachine &TM,
2005 const char* HexagonTargetLowering::getTargetNodeName(unsigned Opcode) const {
2060 bool HexagonTargetLowering::isTruncateFree(Type *Ty1, Type *Ty2) const {
2068 bool HexagonTargetLowering::isTruncateFree(EVT VT1, EVT VT2) const {
2077 HexagonTargetLowering::shouldExpandBuildVectorWithShuffles(EVT VT,
2207 HexagonTargetLowering::LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const {
2345 HexagonTargetLowering::LowerCONCAT_VECTORS(SDValue Op,
2406 HexagonTargetLowering::LowerEXTRACT_VECTOR(SDValue Op,
2480 HexagonTargetLowering::LowerINSERT_VECTOR(SDValue Op,
2532 HexagonTargetLowering::allowTruncateForTailCall(Type *Ty1, Type *Ty2) const {
2545 HexagonTargetLowering::LowerEH_RETURN(SDValue Op, SelectionDAG &DAG) const {
2573 HexagonTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {
2617 HexagonTargetLowering::getPICJumpTableRelocBase(SDValue Table,
2626 HexagonTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
2645 HexagonTargetLowering::getRegForInlineAsmConstraint(
2711 bool HexagonTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT) const {
2717 bool HexagonTargetLowering::isLegalAddressingMode(const DataLayout &DL,
2741 bool HexagonTargetLowering::isOffsetFoldingLegal(const GlobalAddressSDNode *GA)
2751 bool HexagonTargetLowering::isLegalICmpImmediate(int64_t Imm) const {
2758 bool HexagonTargetLowering::IsEligibleForTailCallOptimization(
2818 HexagonTargetLowering::findRepresentativeClass(const TargetRegisterInfo *TRI,
2852 Value *HexagonTargetLowering::emitLoadLinked(IRBuilder<> &Builder, Value *Addr,
2867 Value *HexagonTargetLowering::emitStoreConditional(IRBuilder<> &Builder,
2884 HexagonTargetLowering::shouldExpandAtomicLoadInIR(LoadInst *LI) const {
2891 bool HexagonTargetLowering::shouldExpandAtomicStoreInIR(StoreInst *SI) const {