Target/Hexagon/HexagonGenInsert.cpp

79   struct RegisterSet : private BitVector {
80     RegisterSet() = default;
81     explicit RegisterSet(unsigned s, bool t = false) : BitVector(s, t) {}
99     RegisterSet &insert(unsigned R) {
102       return static_cast<RegisterSet&>(BitVector::set(Idx));
104     RegisterSet &remove(unsigned R) {
108       return static_cast<RegisterSet&>(BitVector::reset(Idx));
111     RegisterSet &insert(const RegisterSet &Rs) {
112       return static_cast<RegisterSet&>(BitVector::operator|=(Rs));
114     RegisterSet &remove(const RegisterSet &Rs) {
115       return static_cast<RegisterSet&>(BitVector::reset(Rs));
138     bool includes(const RegisterSet &Rs) const {
142     bool intersects(const RegisterSet &Rs) const {
161     PrintRegSet(const RegisterSet &S, const TargetRegisterInfo *RI)
166     const RegisterSet &RS;
455   typedef std::pair<IFRecord,RegisterSet> IFRecordWithRegSet;
494     void getInstrDefs(const MachineInstr *MI, RegisterSet &Defs) const;
495     void getInstrUses(const MachineInstr *MI, RegisterSet &Uses) const;
505           RegisterSet &RMs) const;
685       RegisterSet &Defs) const {
699       RegisterSet &Uses) const {
883         IFRecordWithRegSet RR(IFRecord(SrcR, InsR, L, S), RegisterSet());
908   RegisterSet BlockDefs, InsDefs;
956       RegisterSet &RMs) const {
961   RegisterSet Regs[2];
1090     LL.push_back(std::make_pair(MaxIF, RegisterSet()));
1101     const RegisterSet &RMi = LL[i].second;
1197     void stats(const RegisterSet &Rs, unsigned &Size, unsigned &Zero,
1234 void IFOrdering::stats(const RegisterSet &Rs, unsigned &Size, unsigned &Zero,
1255   RegisterSet AllRMs;
1261     RegisterSet TT;
1315     RegisterSet Us;