Lines Matching defs:Op5
5416 auto &Op5 = static_cast<ARMOperand &>(*Operands[5]);
5421 (Op5.isReg() && Op5.getReg() == ARM::PC);
5424 (Op5.isReg() && Op5.getReg() == ARM::SP)) &&
5426 Op5.isImm() && !Op5.isImm0_508s4());
5445 // Op4 and Op5. The 'ADD Rdm, SP, Rdm' form is already handled specially
5447 const ARMOperand *LastOp = &Op5;
5449 if (!Transform && Op5.isReg() && Op3Reg == Op5.getReg() &&
5475 std::swap(Op4, Op5);