Lines Matching refs:Subtarget
164 : TargetLowering(TM), Subtarget(&STI) {
165 RegInfo = Subtarget->getRegisterInfo();
166 Itins = Subtarget->getInstrItineraryData();
170 if (Subtarget->isTargetMachO()) {
172 if (Subtarget->isThumb() && Subtarget->hasVFP2() &&
173 Subtarget->hasARMOps() && !Subtarget->useSoftFloat()) {
243 if (Subtarget->isTargetWatchOS()) {
255 if (Subtarget->isAAPCS_ABI() &&
256 (Subtarget->isTargetAEABI() || Subtarget->isTargetGNUAEABI() ||
257 Subtarget->isTargetAndroid())) {
379 if (Subtarget->isTargetWindows()) {
406 if (Subtarget->isTargetWatchOS() ||
407 (Subtarget->isTargetIOS() &&
408 !Subtarget->getTargetTriple().isOSVersionLT(5, 0))) {
416 if (Subtarget->isAAPCS_ABI()) {
428 if (Subtarget->isTargetAEABI()) {
434 if (Subtarget->isThumb1Only())
438 if (!Subtarget->useSoftFloat() && Subtarget->hasVFP2() &&
439 !Subtarget->isThumb1Only()) {
466 if (Subtarget->hasNEON()) {
607 if (!Subtarget->hasVFP4()) {
642 if (!Subtarget->isThumb1Only())
645 if (Subtarget->isFPOnlySP()) {
685 computeRegisterProperties(Subtarget->getRegisterInfo());
703 if (!Subtarget->isThumb1Only()) {
725 if (Subtarget->isThumb1Only()) {
729 if (Subtarget->isThumb1Only() || !Subtarget->hasV6Ops()
730 || (Subtarget->isThumb2() && !Subtarget->hasDSP()))
739 if (!Subtarget->isThumb1Only()) {
747 if (!Subtarget->isThumb1Only() && Subtarget->hasV6T2Ops())
758 if (!Subtarget->hasV5TOps() || Subtarget->isThumb1Only())
769 if (Subtarget->hasPerfMon())
773 if (!Subtarget->hasV6Ops())
776 if (!(Subtarget->hasDivide() && Subtarget->isThumb2()) &&
777 !(Subtarget->hasDivideInARMMode() && !Subtarget->isThumb())) {
786 if (Subtarget->isTargetAEABI() || Subtarget->isTargetAndroid()) {
830 if (Subtarget->getTargetTriple().isWindowsItaniumEnvironment())
841 else if (Subtarget->hasAnyDataBarrier() && !Subtarget->isThumb1Only()) {
848 if (!Subtarget->hasV8Ops()) {
856 Subtarget->hasAnyDataBarrier() ? Custom : Expand);
880 if (!Subtarget->hasV6Ops()) {
886 if (!Subtarget->useSoftFloat() && Subtarget->hasVFP2() &&
887 !Subtarget->isThumb1Only()) {
899 if (Subtarget->useSjLjEH())
927 if (!Subtarget->useSoftFloat() && Subtarget->hasVFP2() &&
928 !Subtarget->isThumb1Only()) {
935 if (!Subtarget->hasVFP4()) {
941 if (!Subtarget->useSoftFloat() && !Subtarget->isThumb1Only()) {
943 if (!Subtarget->hasFPARMv8() || Subtarget->isFPOnlySP()) {
949 if (!Subtarget->hasFP16()) {
956 if (Subtarget->hasSinCos()) {
959 if (Subtarget->isTargetWatchOS()) {
963 if (Subtarget->isTargetIOS() || Subtarget->isTargetWatchOS()) {
972 if (Subtarget->hasFPARMv8()) {
986 if (!Subtarget->isFPOnlySP()) {
998 if (Subtarget->hasNEON()) {
1018 if (Subtarget->hasV6Ops())
1023 if (Subtarget->useSoftFloat() || Subtarget->isThumb1Only() ||
1024 !Subtarget->hasVFP2())
1042 PredictableSelectIsExpensive = Subtarget->isLikeA9();
1044 setMinFunctionAlignment(Subtarget->isThumb() ? 1 : 2);
1048 return Subtarget->useSoftFloat();
1079 if (Subtarget->useNEONForSinglePrecisionFP())
1247 if (Subtarget->hasNEON()) {
1266 PrefAlign = (Subtarget->hasV6Ops() && !Subtarget->isMClass() ? 8 : 4);
1295 const TargetInstrInfo *TII = Subtarget->getInstrInfo();
1379 if (!Subtarget->isAAPCS_ABI())
1381 else if (Subtarget->hasVFP2() && !Subtarget->isThumb1Only() &&
1389 if (!Subtarget->isAAPCS_ABI()) {
1390 if (Subtarget->hasVFP2() && !Subtarget->isThumb1Only() && !isVarArg)
1393 } else if (Subtarget->hasVFP2() && !Subtarget->isThumb1Only() && !isVarArg)
1464 if (!Subtarget->isLittle())
1481 if (!Subtarget->isLittle())
1535 unsigned id = Subtarget->isLittle() ? 0 : 1;
1577 if (!Subtarget->supportsTailCall() || Attr.getValueAsString() == "true")
1788 if (Subtarget->genLongCalls()) {
1789 assert((Subtarget->isTargetWindows() ||
1829 bool isStub = (!isDef && Subtarget->isTargetMachO()) &&
1831 isARMFunc = !Subtarget->isThumb() || (isStub && !Subtarget->isMClass());
1833 isLocalARMFunc = !Subtarget->isThumb() && (isDef || !ARMInterworking);
1835 if (isStub && Subtarget->isThumb1Only() && !Subtarget->hasV5TOps()) {
1836 assert(Subtarget->isTargetMachO() && "WrapperPIC use on non-MachO?");
1843 } else if (Subtarget->isTargetCOFF()) {
1844 assert(Subtarget->isTargetWindows() &&
1860 if (Subtarget->isTargetELF() &&
1867 bool isStub = Subtarget->isTargetMachO() &&
1869 isARMFunc = !Subtarget->isThumb() || (isStub && !Subtarget->isMClass());
1872 if (isARMFunc && Subtarget->isThumb1Only() && !Subtarget->hasV5TOps()) {
1888 if (Subtarget->isTargetELF() &&
1897 if (Subtarget->isThumb()) {
1898 if ((!isDirect || isARMFunc) && !Subtarget->hasV5TOps())
1903 if (!isDirect && !Subtarget->hasV5TOps())
1905 else if (doesNotRet && isDirect && Subtarget->hasRAS() &&
1927 const ARMBaseRegisterInfo *ARI = Subtarget->getRegisterInfo();
2089 assert(Subtarget->supportsTailCall());
2180 const TargetInstrInfo *TII = Subtarget->getInstrInfo();
2282 bool isLittleEndian = Subtarget->isLittle();
2351 const ARMBaseRegisterInfo *TRI = Subtarget->getRegisterInfo();
2377 !Subtarget->isMClass()) {
2378 if (Subtarget->isThumb1Only())
2462 if (!Subtarget->supportsTailCall())
2529 unsigned PCAdj = Subtarget->isThumb() ? 4 : 8;
2574 assert(Subtarget->isTargetDarwin() && "TLS only supported on Darwin");
2619 unsigned char PCAdj = Subtarget->isThumb() ? 4 : 8;
2674 unsigned char PCAdj = Subtarget->isThumb() ? 4 : 8;
2714 if (Subtarget->isTargetDarwin())
2718 assert(Subtarget->isTargetELF() && "Only ELF implemented here");
2750 unsigned PCAdj = Subtarget->isThumb() ? 4 : 8;
2773 if (Subtarget->useMovt(DAG.getMachineFunction())) {
2796 if (Subtarget->useMovt(DAG.getMachineFunction()))
2807 if (Subtarget->GVIsIndirectSymbol(GV, RelocM))
2816 assert(Subtarget->isTargetWindows() && "non-Windows COFF is not supported");
2817 assert(Subtarget->useMovt(DAG.getMachineFunction()) &&
2866 const ARMSubtarget *Subtarget) const {
2888 ? 0 : (Subtarget->isThumb() ? 4 : 8);
2946 const ARMSubtarget *Subtarget) {
2949 if (!Subtarget->hasDataBarrier()) {
2953 assert(Subtarget->hasV6Ops() && !Subtarget->isThumb() &&
2962 if (Subtarget->isMClass()) {
2965 } else if (Subtarget->isSwift() && Ord == Release) {
2978 const ARMSubtarget *Subtarget) {
2980 if (!(Subtarget->isThumb2() ||
2981 (!Subtarget->isThumb1Only() && Subtarget->hasV5TEOps())))
2988 (!Subtarget->hasV7Ops() || !Subtarget->hasMPExtension()))
2993 if (Subtarget->isThumb()) {
3050 if (!Subtarget->isLittle())
3434 assert(!Subtarget->isFPOnlySP() || RHS.getValueType() != MVT::f64);
3653 if (Subtarget->isFPOnlySP() && VT == MVT::f64) {
3685 if (Subtarget->isFPOnlySP() && LHS.getValueType() == MVT::f64) {
3708 if (Subtarget->hasFPARMv8() && (TrueVal.getValueType() == MVT::f32 ||
3728 if (Subtarget->hasFPARMv8() && (TrueVal.getValueType() == MVT::f32 ||
3759 const ARMSubtarget *Subtarget) {
3767 if (VT != MVT::f32 && !Subtarget->isFPBrccSlow())
3837 bool LHSOk = canChangeToInt(LHS, LHSSeenZero, Subtarget);
3839 bool RHSOk = canChangeToInt(RHS, RHSSeenZero, Subtarget);
3886 if (Subtarget->isFPOnlySP() && LHS.getValueType() == MVT::f64) {
3945 if (Subtarget->isThumb2()) {
3994 if (Subtarget->isFPOnlySP() && Op.getOperand(0).getValueType() == MVT::f64) {
4046 if (Subtarget->isFPOnlySP() && Op.getValueType() == MVT::f64) {
4070 bool UseNEON = !InGPR && Subtarget->hasNEON();
4978 if (IsDouble && Subtarget->isFPOnlySP())
6715 assert(Subtarget->isTargetDarwin());
6733 bool ShouldUseSRet = Subtarget->isAPCS_ABI();
6882 const ARMSubtarget *Subtarget) {
6909 switch (Subtarget->getTargetTriple().getObjectFormat()) {
6924 case ISD::ATOMIC_FENCE: return LowerATOMIC_FENCE(Op, DAG, Subtarget);
6925 case ISD::PREFETCH: return LowerPREFETCH(Op, DAG, Subtarget);
6937 Subtarget);
6941 case ISD::SRA: return LowerShift(Op.getNode(), DAG, Subtarget);
6948 case ISD::CTTZ_ZERO_UNDEF: return LowerCTTZ(Op.getNode(), DAG, Subtarget);
6949 case ISD::CTPOP: return LowerCTPOP(Op.getNode(), DAG, Subtarget);
6951 case ISD::ConstantFP: return LowerConstantFP(Op, DAG, Subtarget);
6952 case ISD::BUILD_VECTOR: return LowerBUILD_VECTOR(Op, DAG, Subtarget);
6976 if (Subtarget->getTargetTriple().isWindowsItaniumEnvironment())
7002 Res = Expand64BitShift(N, DAG, Subtarget);
7009 ReplaceREADCYCLECOUNTER(N, Results, DAG, Subtarget);
7013 assert(Subtarget->isTargetWindows() && "can only expand DIV on Windows");
7030 const TargetInstrInfo *TII = Subtarget->getInstrInfo();
7038 bool isThumb = Subtarget->isThumb();
7039 bool isThumb2 = Subtarget->isThumb2();
7144 const TargetInstrInfo *TII = Subtarget->getInstrInfo();
7151 const TargetRegisterClass *TRC = Subtarget->isThumb() ? &ARM::tGPRRegClass
7213 if (Subtarget->isThumb())
7216 trap_opcode = Subtarget->useNaClTrap() ? ARM::TRAPNaCl : ARM::TRAP;
7248 if (Subtarget->isThumb2()) {
7298 } else if (Subtarget->isThumb()) {
7382 } else if (Subtarget->hasV6T2Ops() && isUInt<16>(NumLPads)) {
7504 if (Subtarget->isThumb2() &&
7508 if (Subtarget->isThumb1Only() && !ARM::tGPRRegClass.contains(Reg))
7510 if (!Subtarget->isThumb() && !ARM::GPRRegClass.contains(Reg))
7643 // We expand it to a loop if size > Subtarget->getMaxInlineSizeThreshold().
7645 const TargetInstrInfo *TII = Subtarget->getInstrInfo();
7661 bool IsThumb1 = Subtarget->isThumb1Only();
7662 bool IsThumb2 = Subtarget->isThumb2();
7671 Subtarget->hasNEON()) {
7693 if (SizeVal <= Subtarget->getMaxInlineSizeThreshold()) {
7761 if (Subtarget->useMovt(*MF)) {
7877 const TargetInstrInfo &TII = *Subtarget->getInstrInfo();
7880 assert(Subtarget->isTargetWindows() &&
7882 assert(Subtarget->isThumb2() && "Windows on ARM requires Thumb-2 mode");
7944 const TargetInstrInfo *TII = Subtarget->getInstrInfo();
7968 const TargetInstrInfo *TII = Subtarget->getInstrInfo();
7970 bool isThumb2 = Subtarget->isThumb2();
8163 bool isThumb2 = Subtarget->isThumb2();
8225 static void attachMEMCPYScratchRegs(const ARMSubtarget *Subtarget,
8227 bool isThumb1 = Subtarget->isThumb1Only();
8253 attachMEMCPYScratchRegs(Subtarget, MI, Node);
8268 const ARMBaseInstrInfo *TII = Subtarget->getInstrInfo();
8462 const ARMSubtarget *Subtarget) {
8466 if (DCI.isBeforeLegalize() || !Subtarget->hasNEON()
8560 const ARMSubtarget *Subtarget) {
8562 if (Subtarget->isThumb1Only()) return SDValue();
8698 const ARMSubtarget *Subtarget) {
8700 return AddCombineTo64bitMLAL(N, DCI, Subtarget);
8710 const ARMSubtarget *Subtarget){
8713 SDValue Result = AddCombineToVPADDL(N, N0, N1, DCI, Subtarget);
8729 const ARMSubtarget *Subtarget) {
8734 SDValue Result = PerformADDCombineWithOperands(N, N0, N1, DCI, Subtarget);
8739 return PerformADDCombineWithOperands(N, N1, N0, DCI, Subtarget);
8775 const ARMSubtarget *Subtarget) {
8776 if (!Subtarget->hasVMLxForwarding())
8806 const ARMSubtarget *Subtarget) {
8809 if (Subtarget->isThumb1Only())
8817 return PerformVMULCombine(N, DCI, Subtarget);
8890 const ARMSubtarget *Subtarget) {
8921 if (!Subtarget->isThumb1Only()) {
8934 const ARMSubtarget *Subtarget) {
8947 if (BVN && Subtarget->hasNEON() &&
8964 if (!Subtarget->isThumb1Only()) {
8980 if (Subtarget->hasNEON() && N1.getOpcode() == ISD::AND && VT.isVector() &&
9016 if (Subtarget->isThumb1Only() || !Subtarget->hasV6T2Ops())
9077 if (Subtarget->hasT2ExtractPack() &&
9093 if (Subtarget->hasT2ExtractPack() &&
9131 const ARMSubtarget *Subtarget) {
9138 if (!Subtarget->isThumb1Only()) {
9285 const ARMSubtarget *Subtarget) {
9288 if (InDouble.getOpcode() == ARMISD::VMOVDRR && !Subtarget->isFPOnlySP())
9361 const ARMSubtarget *Subtarget) {
10064 const ARMSubtarget *Subtarget) {
10065 if (!Subtarget->hasNEON())
10120 const ARMSubtarget *Subtarget) {
10121 if (!Subtarget->hasNEON())
10539 unsigned Heuristic = Subtarget->isThumb() ? 3 : 2;
10595 if (!Subtarget->isThumb1Only() && Subtarget->hasV6T2Ops()) {
10651 case ISD::ADDC: return PerformADDCCombine(N, DCI, Subtarget);
10652 case ISD::ADD: return PerformADDCombine(N, DCI, Subtarget);
10654 case ISD::MUL: return PerformMULCombine(N, DCI, Subtarget);
10655 case ISD::OR: return PerformORCombine(N, DCI, Subtarget);
10656 case ISD::XOR: return PerformXORCombine(N, DCI, Subtarget);
10657 case ISD::AND: return PerformANDCombine(N, DCI, Subtarget);
10659 case ARMISD::VMOVRRD: return PerformVMOVRRDCombine(N, DCI, Subtarget);
10662 case ISD::BUILD_VECTOR: return PerformBUILD_VECTORCombine(N, DCI, Subtarget);
10668 return PerformVCVTCombine(N, DCI.DAG, Subtarget);
10670 return PerformVDIVCombine(N, DCI.DAG, Subtarget);
10674 case ISD::SRL: return PerformShiftCombine(N, DCI.DAG, Subtarget);
10677 case ISD::ANY_EXTEND: return PerformExtendCombine(N, DCI.DAG, Subtarget);
10721 bool AllowsUnaligned = Subtarget->allowsUnalignedMem();
10732 *Fast = Subtarget->hasV7Ops();
10742 if (Subtarget->hasNEON() && (AllowsUnaligned || Subtarget->isLittle())) {
10766 if ((!IsMemset || ZeroMemset) && Subtarget->hasNEON() &&
10877 const ARMSubtarget *Subtarget) {
10897 if (!Subtarget->hasVFP2())
10910 const ARMSubtarget *Subtarget) {
10917 if (Subtarget->isThumb1Only())
10919 else if (Subtarget->isThumb2())
10920 return isLegalT2AddressImmediate(V, VT, Subtarget);
10937 if (!Subtarget->hasVFP2()) // FIXME: NEON?
10985 if (!isLegalAddressImmediate(AM.BaseOffs, VT, Subtarget))
10996 if (Subtarget->isThumb1Only())
11007 if (Subtarget->isThumb2())
11047 if (!Subtarget->isThumb())
11049 if (Subtarget->isThumb2())
11062 if (!Subtarget->isThumb())
11064 if (Subtarget->isThumb2())
11162 if (Subtarget->isThumb1Only())
11180 if (Subtarget->isThumb2())
11201 if (Subtarget->isThumb1Only())
11219 if (Subtarget->isThumb2())
11232 !Subtarget->isThumb2())
11296 if (!Subtarget->hasV6Ops())
11372 if (Subtarget->isThumb())
11393 if (Subtarget->isThumb())
11397 if (Subtarget->isThumb())
11401 if (Subtarget->isThumb1Only())
11468 if (Subtarget->hasV6T2Ops())
11473 if (Subtarget->isThumb1Only()) {
11478 } else if (Subtarget->isThumb2()) {
11492 if (Subtarget->isThumb1Only()) {
11509 if (Subtarget->isThumb1Only()) {
11516 } else if (Subtarget->isThumb2()) {
11536 if (Subtarget->isThumb1Only()) {
11541 } else if (Subtarget->isThumb2()) {
11561 if (Subtarget->isThumb1Only()) {
11576 if (Subtarget->isThumb()) { // FIXME thumb2
11584 if (Subtarget->isThumb()) { // FIXME thumb2
11643 assert((Subtarget->isTargetAEABI() || Subtarget->isTargetAndroid()) &&
11717 assert(Subtarget->isTargetWindows() && "unsupported target platform");
11742 assert(Op.getValueType() == MVT::f64 && Subtarget->isFPOnlySP() &&
11755 Subtarget->isFPOnlySP() &&
11785 if (!Subtarget->hasVFP3())
11789 if (VT == MVT::f64 && !Subtarget->isFPOnlySP())
11925 if (!Subtarget->hasDataBarrier()) {
11929 if (Subtarget->hasV6Ops() && !Subtarget->isThumb()) {
11943 Domain = Subtarget->isMClass() ? ARM_MB::SY : Domain;
11969 if (Subtarget->isSwift())
12005 return (Size == 64) && !Subtarget->isMClass();
12018 return ((Size == 64) && !Subtarget->isMClass()) ? AtomicExpansionKind::LLOnly
12027 return (Size <= (Subtarget->isMClass() ? 32U : 64U))
12039 return Subtarget->isTargetMachO();
12045 if (!Subtarget->hasNEON())
12072 return Subtarget->hasV6T2Ops();
12076 return Subtarget->hasV6T2Ops();
12098 if (!Subtarget->isLittle())
12117 if (!Subtarget->hasV7Ops())
12140 if (!Subtarget->isLittle())
12185 if (!Subtarget->hasNEON() || (VecSize != 64 && VecSize != 128) || EltIs64Bits)
12275 if (!Subtarget->hasNEON() || (SubVecSize != 64 && SubVecSize != 128) ||
12400 return Subtarget->useSjLjEH() ? ARM::NoRegister : ARM::R0;
12407 return Subtarget->useSjLjEH() ? ARM::NoRegister : ARM::R1;
12419 const ARMBaseRegisterInfo *TRI = Subtarget->getRegisterInfo();
12424 const TargetInstrInfo *TII = Subtarget->getInstrInfo();