Target/ARM/ARMISelLowering.cpp

36 #include "llvm/CodeGen/SelectionDAG.h"
1427                                    SDLoc dl, SelectionDAG &DAG,
1512                                     SDLoc dl, SelectionDAG &DAG,
1525 void ARMTargetLowering::PassF64ArgInRegs(SDLoc dl, SelectionDAG &DAG,
1558   SelectionDAG &DAG                     = CLI.DAG;
2084                                                      SelectionDAG& DAG) const {
2229                                     SDLoc DL, SelectionDAG &DAG) {
2266                                SDLoc dl, SelectionDAG &DAG) const {
2475 static SDValue LowerWRITE_REGISTER(SDValue Op, SelectionDAG &DAG) {
2497 static SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) {
2517                                              SelectionDAG &DAG) const {
2573                                                SelectionDAG &DAG) const {
2616                                                  SelectionDAG &DAG) const {
2659                                         SelectionDAG &DAG,
2713 ARMTargetLowering::LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const {
2737                                                  SelectionDAG &DAG) const {
2790                                                     SelectionDAG &DAG) const {
2815                                                      SelectionDAG &DAG) const {
2842 ARMTargetLowering::LowerEH_SJLJ_SETJMP(SDValue Op, SelectionDAG &DAG) const {
2851 ARMTargetLowering::LowerEH_SJLJ_LONGJMP(SDValue Op, SelectionDAG &DAG) const {
2858                                                       SelectionDAG &DAG) const {
2865 ARMTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG,
2945 static SDValue LowerATOMIC_FENCE(SDValue Op, SelectionDAG &DAG,
2977 static SDValue LowerPREFETCH(SDValue Op, SelectionDAG &DAG,
3004 static SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG) {
3020                                         SDValue &Root, SelectionDAG &DAG,
3064 ARMTargetLowering::StoreByValRegs(CCState &CCInfo, SelectionDAG &DAG,
3121 ARMTargetLowering::VarArgStyleRegisters(CCState &CCInfo, SelectionDAG &DAG,
3145                                         SDLoc dl, SelectionDAG &DAG,
3374                              SDValue &ARMcc, SelectionDAG &DAG,
3432 ARMTargetLowering::getVFPCmp(SDValue LHS, SDValue RHS, SelectionDAG &DAG,
3446 ARMTargetLowering::duplicateCmp(SDValue Cmp, SelectionDAG &DAG) const {
3465 ARMTargetLowering::getARMXALUOOp(SDValue Op, SelectionDAG &DAG,
3509 ARMTargetLowering::LowerXALUO(SDValue Op, SelectionDAG &DAG) const {
3532 SDValue ARMTargetLowering::LowerSELECT(SDValue Op, SelectionDAG &DAG) const {
3652                                    SDValue Cmp, SelectionDAG &DAG) const {
3676 SDValue ARMTargetLowering::LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const {
3779 static SDValue bitcastf32Toi32(SDValue Op, SelectionDAG &DAG) {
3792 static void expandf64Toi32(SDValue Op, SelectionDAG &DAG,
3828 ARMTargetLowering::OptimizeVFPBrcond(SDValue Op, SelectionDAG &DAG) const {
3878 SDValue ARMTargetLowering::LowerBR_CC(SDValue Op, SelectionDAG &DAG) const {
3933 SDValue ARMTargetLowering::LowerBR_JT(SDValue Op, SelectionDAG &DAG) const {
3971 static SDValue LowerVectorFP_TO_INT(SDValue Op, SelectionDAG &DAG) {
3990 SDValue ARMTargetLowering::LowerFP_TO_INT(SDValue Op, SelectionDAG &DAG) const {
4009 static SDValue LowerVectorINT_TO_FP(SDValue Op, SelectionDAG &DAG) {
4042 SDValue ARMTargetLowering::LowerINT_TO_FP(SDValue Op, SelectionDAG &DAG) const {
4061 SDValue ARMTargetLowering::LowerFCOPYSIGN(SDValue Op, SelectionDAG &DAG) const {
4143 SDValue ARMTargetLowering::LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const{
4167 SDValue ARMTargetLowering::LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const {
4189                                               SelectionDAG &DAG) const {
4202                                 SelectionDAG &DAG) {
4227                                                 SelectionDAG &DAG) {
4274 static SDValue ExpandBITCAST(SDNode *N, SelectionDAG &DAG) {
4325 static SDValue getZeroVector(EVT VT, SelectionDAG &DAG, SDLoc dl) {
4337                                                 SelectionDAG &DAG) const {
4373                                                SelectionDAG &DAG) const {
4405                                             SelectionDAG &DAG) const {
4422 static SDValue LowerCTTZ(SDNode *N, SelectionDAG &DAG,
4521 static SDValue getCTPOP16BitCounts(SDNode *N, SelectionDAG &DAG) {
4543 static SDValue lowerCTPOP16BitElements(SDNode *N, SelectionDAG &DAG) {
4578 static SDValue lowerCTPOP32BitElements(SDNode *N, SelectionDAG &DAG) {
4601 static SDValue LowerCTPOP(SDNode *N, SelectionDAG &DAG,
4616 static SDValue LowerShift(SDNode *N, SelectionDAG &DAG,
4652 static SDValue Expand64BitShift(SDNode *N, SelectionDAG &DAG,
4689 static SDValue LowerVSETCC(SDValue Op, SelectionDAG &DAG) {
4833                                  unsigned SplatBitSize, SelectionDAG &DAG,
4968 SDValue ARMTargetLowering::LowerConstantFP(SDValue Op, SelectionDAG &DAG,
5423 static SDValue IsSingleInstrConstant(SDValue N, SelectionDAG &DAG,
5442 SDValue ARMTargetLowering::LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG,
5652                                               SelectionDAG &DAG) const {
5897                                       SDValue RHS, SelectionDAG &DAG,
5974                                        SelectionDAG &DAG) {
5994                                                       SelectionDAG &DAG) {
6010 static SDValue LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) {
6187 static SDValue LowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) {
6196 static SDValue LowerEXTRACT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) {
6212 static SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) {
6235 static bool isExtendedBUILD_VECTOR(SDNode *N, SelectionDAG &DAG,
6288 static bool isSignExtended(SDNode *N, SelectionDAG &DAG) {
6298 static bool isZeroExtended(SDNode *N, SelectionDAG &DAG) {
6326 static SDValue AddRequiredExtensionForVMULL(SDValue N, SelectionDAG &DAG,
6348 static SDValue SkipLoadExtensionForVMULL(LoadSDNode *LD, SelectionDAG& DAG) {
6373 static SDValue SkipExtensionForVMULL(SDNode *N, SelectionDAG &DAG) {
6412 static bool isAddSubSExt(SDNode *N, SelectionDAG &DAG) {
6423 static bool isAddSubZExt(SDNode *N, SelectionDAG &DAG) {
6434 static SDValue LowerMUL(SDValue Op, SelectionDAG &DAG) {
6510 LowerSDIV_v4i8(SDValue X, SDValue Y, SDLoc dl, SelectionDAG &DAG) {
6542 LowerSDIV_v4i16(SDValue N0, SDValue N1, SDLoc dl, SelectionDAG &DAG) {
6581 static SDValue LowerSDIV(SDValue Op, SelectionDAG &DAG) {
6616 static SDValue LowerUDIV(SDValue Op, SelectionDAG &DAG) {
6693 static SDValue LowerADDC_ADDE_SUBC_SUBE(SDValue Op, SelectionDAG &DAG) {
6714 SDValue ARMTargetLowering::LowerFSINCOS(SDValue Op, SelectionDAG &DAG) const {
6790 SDValue ARMTargetLowering::LowerWindowsDIVLibCall(SDValue Op, SelectionDAG &DAG,
6827 SDValue ARMTargetLowering::LowerDIV_Windows(SDValue Op, SelectionDAG &DAG,
6840     SDValue Op, SelectionDAG &DAG, bool Signed,
6869 static SDValue LowerAtomicLoadStore(SDValue Op, SelectionDAG &DAG) {
6881                                     SelectionDAG &DAG,
6902 SDValue ARMTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {
6989                                            SelectionDAG &DAG) const {
8344                                        SelectionDAG &DAG) {
8418   SelectionDAG &DAG = DCI.DAG;
8520   SelectionDAG &DAG = DCI.DAG;
8670   SelectionDAG &DAG = DCI.DAG;
8779   SelectionDAG &DAG = DCI.DAG;
8807   SelectionDAG &DAG = DCI.DAG;
8896   SelectionDAG &DAG = DCI.DAG;
8939   SelectionDAG &DAG = DCI.DAG;
9133   SelectionDAG &DAG = DCI.DAG;
9300     SelectionDAG &DAG = DCI.DAG;
9327 static SDValue PerformVMOVDRRCombine(SDNode *N, SelectionDAG &DAG) {
9366   SelectionDAG &DAG = DCI.DAG;
9447   SelectionDAG &DAG = DCI.DAG;
9496   SelectionDAG &DAG = DCI.DAG;
9512 static SDValue PerformVECTOR_SHUFFLECombine(SDNode *N, SelectionDAG &DAG) {
9570   SelectionDAG &DAG = DCI.DAG;
9786   SelectionDAG &DAG = DCI.DAG;
9920     SelectionDAG &DAG = DCI.DAG;
10003     SelectionDAG  &DAG = DCI.DAG;
10026     SelectionDAG &DAG = DCI.DAG;
10063 static SDValue PerformVCVTCombine(SDNode *N, SelectionDAG &DAG,
10119 static SDValue PerformVDIVCombine(SDNode *N, SelectionDAG &DAG,
10222 static SDValue PerformIntrinsicCombine(SDNode *N, SelectionDAG &DAG) {
10369 static SDValue PerformShiftCombine(SDNode *N, SelectionDAG &DAG,
10419 static SDValue PerformExtendCombine(SDNode *N, SelectionDAG &DAG,
10457 static void computeKnownBits(SelectionDAG &DAG, SDValue Op, APInt &KnownZero,
10485 SDValue ARMTargetLowering::PerformCMOVToBFICombine(SDNode *CMOV, SelectionDAG &DAG) const {
10578 ARMTargetLowering::PerformCMOVCombine(SDNode *N, SelectionDAG &DAG) const {
11073                                       SelectionDAG &DAG) {
11132                                      SelectionDAG &DAG) {
11161                                              SelectionDAG &DAG) const {
11200                                                    SelectionDAG &DAG) const {
11247                                                       const SelectionDAG &DAG,
11441                                                      SelectionDAG &DAG) const {
11642 SDValue ARMTargetLowering::LowerDivRem(SDValue Op, SelectionDAG &DAG) const {
11676 SDValue ARMTargetLowering::LowerREM(SDNode *N, SelectionDAG &DAG) const {
11716 ARMTargetLowering::LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) const {
11741 SDValue ARMTargetLowering::LowerFP_EXTEND(SDValue Op, SelectionDAG &DAG) const {
11753 SDValue ARMTargetLowering::LowerFP_ROUND(SDValue Op, SelectionDAG &DAG) const {