Target/ARM/ARMISelLowering.cpp

10172 static bool getVShiftImm(SDValue Op, unsigned ElementBits, int64_t &Cnt) {
10184   Cnt = SplatBits.getSExtValue();
10192 static bool isVShiftLImm(SDValue Op, EVT VT, bool isLong, int64_t &Cnt) {
10195   if (! getVShiftImm(Op, ElementBits, Cnt))
10197   return (Cnt >= 0 && (isLong ? Cnt-1 : Cnt) < ElementBits);
10207                          int64_t &Cnt) {
10210   if (! getVShiftImm(Op, ElementBits, Cnt))
10213     return (Cnt >= 1 && Cnt <= (isNarrow ? ElementBits/2 : ElementBits));
10214   if (Cnt >= -(isNarrow ? ElementBits/2 : ElementBits) && Cnt <= -1) {
10215     Cnt = -Cnt;
10249     int64_t Cnt;
10255       if (isVShiftLImm(N->getOperand(2), VT, false, Cnt)) {
10259       if (isVShiftRImm(N->getOperand(2), VT, false, true, Cnt)) {
10268       if (isVShiftRImm(N->getOperand(2), VT, false, true, Cnt))
10274       if (isVShiftLImm(N->getOperand(2), VT, false, Cnt))
10279       if (isVShiftLImm(N->getOperand(2), VT, false, Cnt))
10291       if (isVShiftRImm(N->getOperand(2), VT, true, true, Cnt))
10333                        N->getOperand(1), DAG.getConstant(Cnt, dl, MVT::i32));
10338     int64_t Cnt;
10341     if (isVShiftLImm(N->getOperand(3), VT, false, Cnt))
10343     else if (isVShiftRImm(N->getOperand(3), VT, false, true, Cnt))
10352                        DAG.getConstant(Cnt, dl, MVT::i32));
10391   int64_t Cnt;
10397     if (isVShiftLImm(N->getOperand(1), VT, false, Cnt)) {
10400                          DAG.getConstant(Cnt, dl, MVT::i32));
10406     if (isVShiftRImm(N->getOperand(1), VT, false, false, Cnt)) {
10411                          DAG.getConstant(Cnt, dl, MVT::i32));