Target/ARM/ARMISelDAGToDAG.cpp

273                         bool is64BitVector);
1689                                        unsigned NumVecs, bool is64BitVector) {
1691   if (!is64BitVector && NumVecs < 3)
1823   bool is64BitVector = VT.is64BitVector();
1824   Align = GetVLDSTAlign(Align, dl, NumVecs, is64BitVector);
1851     if (!is64BitVector)
1867   if (is64BitVector || NumVecs <= 2) {
1868     unsigned Opc = (is64BitVector ? DOpcodes[OpcodeIndex] :
1932   unsigned Sub0 = (is64BitVector ? ARM::dsub_0 : ARM::qsub_0);
1960   bool is64BitVector = VT.is64BitVector();
1961   Align = GetVLDSTAlign(Align, dl, NumVecs, is64BitVector);
1993   if (is64BitVector || NumVecs <= 2) {
1997     } else if (is64BitVector) {
2019     unsigned Opc = (is64BitVector ? DOpcodes[OpcodeIndex] :
2109   bool is64BitVector = VT.is64BitVector();
2143     if (!is64BitVector)
2167     if (is64BitVector)
2176     if (is64BitVector)
2187   unsigned Opc = (is64BitVector ? DOpcodes[OpcodeIndex] :
2198   unsigned Sub0 = is64BitVector ? ARM::dsub_0 : ARM::qsub_0;