Lines Matching refs:Orig
190 static MachineOperand copyRegOperandAsImplicit(const MachineOperand &Orig) {
191 assert(!Orig.isImplicit());
192 return MachineOperand::CreateReg(Orig.getReg(),
193 Orig.isDef(),
195 Orig.isKill(),
196 Orig.isDead(),
197 Orig.isUndef(),
198 Orig.isEarlyClobber(),
199 Orig.getSubReg(),
200 Orig.isDebug(),
201 Orig.isInternalRead());