Lines Matching refs:SelectionDAG

24   SDValue LowerParameter(SelectionDAG &DAG, EVT VT, EVT MemVT, SDLoc DL,
27 SelectionDAG &DAG) const;
29 SelectionDAG &DAG) const override;
31 SDValue lowerImplicitZextParam(SelectionDAG &DAG, SDValue Op,
34 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
35 SDValue LowerINTRINSIC_VOID(SDValue Op, SelectionDAG &DAG) const;
36 SDValue LowerFrameIndex(SDValue Op, SelectionDAG &DAG) const;
37 SDValue LowerLOAD(SDValue Op, SelectionDAG &DAG) const;
38 SDValue LowerSELECT(SDValue Op, SelectionDAG &DAG) const;
39 SDValue LowerFastFDIV(SDValue Op, SelectionDAG &DAG) const;
40 SDValue LowerFDIV32(SDValue Op, SelectionDAG &DAG) const;
41 SDValue LowerFDIV64(SDValue Op, SelectionDAG &DAG) const;
42 SDValue LowerFDIV(SDValue Op, SelectionDAG &DAG) const;
43 SDValue LowerINT_TO_FP(SDValue Op, SelectionDAG &DAG, bool Signed) const;
44 SDValue LowerSTORE(SDValue Op, SelectionDAG &DAG) const;
45 SDValue LowerTrig(SDValue Op, SelectionDAG &DAG) const;
46 SDValue LowerBRCOND(SDValue Op, SelectionDAG &DAG) const;
48 void adjustWritemask(MachineSDNode *&N, SelectionDAG &DAG) const;
95 SDLoc DL, SelectionDAG &DAG,
103 SDLoc DL, SelectionDAG &DAG) const override;
112 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
114 SDNode *PostISelFolding(MachineSDNode *N, SelectionDAG &DAG) const override;
119 SDValue CreateLiveInRegister(SelectionDAG &DAG, const TargetRegisterClass *RC,
121 void legalizeTargetIndependentNode(SDNode *Node, SelectionDAG &DAG) const;
123 MachineSDNode *wrapAddr64Rsrc(SelectionDAG &DAG, SDLoc DL, SDValue Ptr) const;
124 MachineSDNode *buildRSRC(SelectionDAG &DAG,
133 SDValue copyToM0(SelectionDAG &DAG, SDValue Chain, SDLoc DL, SDValue V) const;