Lines Matching defs:ScratchRsrcReg
72 unsigned ScratchRsrcReg = MFI->getScratchRSrcReg();
73 assert(ScratchRsrcReg != AMDGPU::NoRegister);
89 if (ScratchRsrcReg == PreloadedPrivateBufferReg) {
119 if (ScratchRsrcReg == TRI->reservedPrivateSegmentBufferReg(MF)) {
130 MRI.replaceRegWith(ScratchRsrcReg, Reg);
131 ScratchRsrcReg = Reg;
132 MFI->setScratchRSrcReg(ScratchRsrcReg);
148 !TRI->isSubRegisterEq(ScratchRsrcReg, Reg));
160 assert(!TRI->isSubRegister(ScratchRsrcReg, ScratchWaveOffsetReg));
176 !TRI->isSubRegisterEq(PreloadedPrivateBufferReg, ScratchRsrcReg) &&
179 unsigned Rsrc01 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub0_sub1);
180 unsigned Rsrc23 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub2_sub3);
192 unsigned Rsrc0 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub0);
193 unsigned Rsrc1 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub1);
194 unsigned Rsrc2 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub2);
195 unsigned Rsrc3 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub3);
201 .addReg(ScratchRsrcReg, RegState::ImplicitDefine);
205 .addReg(ScratchRsrcReg, RegState::ImplicitDefine);
209 .addReg(ScratchRsrcReg, RegState::ImplicitDefine);
213 .addReg(ScratchRsrcReg, RegState::ImplicitDefine);
221 OtherBB.addLiveIn(ScratchRsrcReg);