Lines Matching refs:sign
1562 SDValue AMDGPUTargetLowering::LowerDIVREM24(SDValue Op, SelectionDAG &DAG, bool sign) const {
1570 ISD::NodeType ToFp = sign ? ISD::SINT_TO_FP : ISD::UINT_TO_FP;
1571 ISD::NodeType ToInt = sign ? ISD::FP_TO_SINT : ISD::FP_TO_UINT;
1583 if (sign) {
1599 SDValue ia = sign ?
1603 SDValue ib = sign ?
1645 iq = sign ? DAG.getSExtOrTrunc(iq, DL, VT) : DAG.getZExtOrTrunc(iq, DL, VT);
1892 SDValue RSign = LHSign; // Remainder sign is the same as LHS
1982 // Extract the upper half, since this is where we will find the sign and
1990 // Extract the sign bit.
2459 // be a sign bit.
2738 // This is already sign / zero extended, so try to fold away extra BFEs.