AArch64/Disassembler/AArch64Disassembler.cpp

33 static DecodeStatus DecodeFPR128RegisterClass(llvm::MCInst &Inst,
36 static DecodeStatus DecodeFPR128_loRegisterClass(llvm::MCInst &Inst,
40 static DecodeStatus DecodeFPR64RegisterClass(llvm::MCInst &Inst, unsigned RegNo,
43 static DecodeStatus DecodeFPR32RegisterClass(llvm::MCInst &Inst, unsigned RegNo,
46 static DecodeStatus DecodeFPR16RegisterClass(llvm::MCInst &Inst, unsigned RegNo,
49 static DecodeStatus DecodeFPR8RegisterClass(llvm::MCInst &Inst, unsigned RegNo,
52 static DecodeStatus DecodeGPR64RegisterClass(llvm::MCInst &Inst, unsigned RegNo,
55 static DecodeStatus DecodeGPR64spRegisterClass(llvm::MCInst &Inst,
58 static DecodeStatus DecodeGPR32RegisterClass(llvm::MCInst &Inst, unsigned RegNo,
61 static DecodeStatus DecodeGPR32spRegisterClass(llvm::MCInst &Inst,
64 static DecodeStatus DecodeQQRegisterClass(llvm::MCInst &Inst, unsigned RegNo,
67 static DecodeStatus DecodeQQQRegisterClass(llvm::MCInst &Inst, unsigned RegNo,
70 static DecodeStatus DecodeQQQQRegisterClass(llvm::MCInst &Inst, unsigned RegNo,
73 static DecodeStatus DecodeDDRegisterClass(llvm::MCInst &Inst, unsigned RegNo,
76 static DecodeStatus DecodeDDDRegisterClass(llvm::MCInst &Inst, unsigned RegNo,
79 static DecodeStatus DecodeDDDDRegisterClass(llvm::MCInst &Inst, unsigned RegNo,
83 static DecodeStatus DecodeFixedPointScaleImm32(llvm::MCInst &Inst, unsigned Imm,
86 static DecodeStatus DecodeFixedPointScaleImm64(llvm::MCInst &Inst, unsigned Imm,
89 static DecodeStatus DecodePCRelLabel19(llvm::MCInst &Inst, unsigned Imm,
91 static DecodeStatus DecodeMemExtend(llvm::MCInst &Inst, unsigned Imm,
93 static DecodeStatus DecodeMRSSystemRegister(llvm::MCInst &Inst, unsigned Imm,
95 static DecodeStatus DecodeMSRSystemRegister(llvm::MCInst &Inst, unsigned Imm,
97 static DecodeStatus DecodeThreeAddrSRegInstruction(llvm::MCInst &Inst,
101 static DecodeStatus DecodeMoveImmInstruction(llvm::MCInst &Inst, uint32_t insn,
104 static DecodeStatus DecodeUnsignedLdStInstruction(llvm::MCInst &Inst,
108 static DecodeStatus DecodeSignedLdStInstruction(llvm::MCInst &Inst,
111 static DecodeStatus DecodeExclusiveLdStInstruction(llvm::MCInst &Inst,
115 static DecodeStatus DecodePairLdStInstruction(llvm::MCInst &Inst, uint32_t insn,
118 static DecodeStatus DecodeAddSubERegInstruction(llvm::MCInst &Inst,
121 static DecodeStatus DecodeLogicalImmInstruction(llvm::MCInst &Inst,
124 static DecodeStatus DecodeModImmInstruction(llvm::MCInst &Inst, uint32_t insn,
127 static DecodeStatus DecodeModImmTiedInstruction(llvm::MCInst &Inst,
130 static DecodeStatus DecodeAdrInstruction(llvm::MCInst &Inst, uint32_t insn,
132 static DecodeStatus DecodeBaseAddSubImm(llvm::MCInst &Inst, uint32_t insn,
134 static DecodeStatus DecodeUnconditionalBranch(llvm::MCInst &Inst, uint32_t insn,
137 static DecodeStatus DecodeSystemPStateInstruction(llvm::MCInst &Inst,
141 static DecodeStatus DecodeTestAndBranch(llvm::MCInst &Inst, uint32_t insn,
144 static DecodeStatus DecodeFMOVLaneInstruction(llvm::MCInst &Inst, unsigned Insn,
147 static DecodeStatus DecodeVecShiftR64Imm(llvm::MCInst &Inst, unsigned Imm,
149 static DecodeStatus DecodeVecShiftR64ImmNarrow(llvm::MCInst &Inst, unsigned Imm,
152 static DecodeStatus DecodeVecShiftR32Imm(llvm::MCInst &Inst, unsigned Imm,
154 static DecodeStatus DecodeVecShiftR32ImmNarrow(llvm::MCInst &Inst, unsigned Imm,
157 static DecodeStatus DecodeVecShiftR16Imm(llvm::MCInst &Inst, unsigned Imm,
159 static DecodeStatus DecodeVecShiftR16ImmNarrow(llvm::MCInst &Inst, unsigned Imm,
162 static DecodeStatus DecodeVecShiftR8Imm(llvm::MCInst &Inst, unsigned Imm,
164 static DecodeStatus DecodeVecShiftL64Imm(llvm::MCInst &Inst, unsigned Imm,
166 static DecodeStatus DecodeVecShiftL32Imm(llvm::MCInst &Inst, unsigned Imm,
168 static DecodeStatus DecodeVecShiftL16Imm(llvm::MCInst &Inst, unsigned Imm,
170 static DecodeStatus DecodeVecShiftL8Imm(llvm::MCInst &Inst, unsigned Imm,
172 static DecodeStatus DecodeWSeqPairsClassRegisterClass(MCInst &Inst,
176 static DecodeStatus DecodeXSeqPairsClassRegisterClass(MCInst &Inst,
265 static DecodeStatus DecodeFPR128RegisterClass(MCInst &Inst, unsigned RegNo,
272   Inst.addOperand(MCOperand::createReg(Register));
276 static DecodeStatus DecodeFPR128_loRegisterClass(MCInst &Inst, unsigned RegNo,
281   return DecodeFPR128RegisterClass(Inst, RegNo, Addr, Decoder);
294 static DecodeStatus DecodeFPR64RegisterClass(MCInst &Inst, unsigned RegNo,
301   Inst.addOperand(MCOperand::createReg(Register));
315 static DecodeStatus DecodeFPR32RegisterClass(MCInst &Inst, unsigned RegNo,
322   Inst.addOperand(MCOperand::createReg(Register));
336 static DecodeStatus DecodeFPR16RegisterClass(MCInst &Inst, unsigned RegNo,
343   Inst.addOperand(MCOperand::createReg(Register));
357 static DecodeStatus DecodeFPR8RegisterClass(MCInst &Inst, unsigned RegNo,
364   Inst.addOperand(MCOperand::createReg(Register));
378 static DecodeStatus DecodeGPR64RegisterClass(MCInst &Inst, unsigned RegNo,
385   Inst.addOperand(MCOperand::createReg(Register));
389 static DecodeStatus DecodeGPR64spRegisterClass(MCInst &Inst, unsigned RegNo,
397   Inst.addOperand(MCOperand::createReg(Register));
411 static DecodeStatus DecodeGPR32RegisterClass(MCInst &Inst, unsigned RegNo,
418   Inst.addOperand(MCOperand::createReg(Register));
422 static DecodeStatus DecodeGPR32spRegisterClass(MCInst &Inst, unsigned RegNo,
431   Inst.addOperand(MCOperand::createReg(Register));
445 static DecodeStatus DecodeVectorRegisterClass(MCInst &Inst, unsigned RegNo,
452   Inst.addOperand(MCOperand::createReg(Register));
467 static DecodeStatus DecodeQQRegisterClass(MCInst &Inst, unsigned RegNo,
472   Inst.addOperand(MCOperand::createReg(Register));
490 static DecodeStatus DecodeQQQRegisterClass(MCInst &Inst, unsigned RegNo,
495   Inst.addOperand(MCOperand::createReg(Register));
513 static DecodeStatus DecodeQQQQRegisterClass(MCInst &Inst, unsigned RegNo,
519   Inst.addOperand(MCOperand::createReg(Register));
534 static DecodeStatus DecodeDDRegisterClass(MCInst &Inst, unsigned RegNo,
539   Inst.addOperand(MCOperand::createReg(Register));
557 static DecodeStatus DecodeDDDRegisterClass(MCInst &Inst, unsigned RegNo,
562   Inst.addOperand(MCOperand::createReg(Register));
580 static DecodeStatus DecodeDDDDRegisterClass(MCInst &Inst, unsigned RegNo,
586   Inst.addOperand(MCOperand::createReg(Register));
590 static DecodeStatus DecodeFixedPointScaleImm32(llvm::MCInst &Inst, unsigned Imm,
595   Inst.addOperand(MCOperand::createImm(64 - Imm));
599 static DecodeStatus DecodeFixedPointScaleImm64(llvm::MCInst &Inst, unsigned Imm,
602   Inst.addOperand(MCOperand::createImm(64 - Imm));
606 static DecodeStatus DecodePCRelLabel19(llvm::MCInst &Inst, unsigned Imm,
616   if (!Dis->tryAddingSymbolicOperand(Inst, ImmVal *  4, Addr,
617                                      Inst.getOpcode() != AArch64::LDRXl, 0, 4))
618     Inst.addOperand(MCOperand::createImm(ImmVal));
622 static DecodeStatus DecodeMemExtend(llvm::MCInst &Inst, unsigned Imm,
624   Inst.addOperand(MCOperand::createImm((Imm  >> 1) & 1));
625   Inst.addOperand(MCOperand::createImm(Imm & 1));
629 static DecodeStatus DecodeMRSSystemRegister(llvm::MCInst &Inst, unsigned Imm,
632   Inst.addOperand(MCOperand::createImm(Imm));
639 static DecodeStatus DecodeMSRSystemRegister(llvm::MCInst &Inst, unsigned Imm,
642   Inst.addOperand(MCOperand::createImm(Imm));
647 static DecodeStatus DecodeFMOVLaneInstruction(llvm::MCInst &Inst, unsigned Insn,
657     DecodeFPR128RegisterClass(Inst, Rd, Address, Decoder);
658     DecodeGPR64RegisterClass(Inst, Rn, Address, Decoder);
660     DecodeGPR64RegisterClass(Inst, Rd, Address, Decoder);
661     DecodeFPR128RegisterClass(Inst, Rn, Address, Decoder);
665   Inst.addOperand(MCOperand::createImm(1));
670 static DecodeStatus DecodeVecShiftRImm(llvm::MCInst &Inst, unsigned Imm,
672   Inst.addOperand(MCOperand::createImm(Add - Imm));
676 static DecodeStatus DecodeVecShiftLImm(llvm::MCInst &Inst, unsigned Imm,
678   Inst.addOperand(MCOperand::createImm((Imm + Add) & (Add - 1)));
682 static DecodeStatus DecodeVecShiftR64Imm(llvm::MCInst &Inst, unsigned Imm,
684   return DecodeVecShiftRImm(Inst, Imm, 64);
687 static DecodeStatus DecodeVecShiftR64ImmNarrow(llvm::MCInst &Inst, unsigned Imm,
690   return DecodeVecShiftRImm(Inst, Imm | 0x20, 64);
693 static DecodeStatus DecodeVecShiftR32Imm(llvm::MCInst &Inst, unsigned Imm,
695   return DecodeVecShiftRImm(Inst, Imm, 32);
698 static DecodeStatus DecodeVecShiftR32ImmNarrow(llvm::MCInst &Inst, unsigned Imm,
701   return DecodeVecShiftRImm(Inst, Imm | 0x10, 32);
704 static DecodeStatus DecodeVecShiftR16Imm(llvm::MCInst &Inst, unsigned Imm,
706   return DecodeVecShiftRImm(Inst, Imm, 16);
709 static DecodeStatus DecodeVecShiftR16ImmNarrow(llvm::MCInst &Inst, unsigned Imm,
712   return DecodeVecShiftRImm(Inst, Imm | 0x8, 16);
715 static DecodeStatus DecodeVecShiftR8Imm(llvm::MCInst &Inst, unsigned Imm,
717   return DecodeVecShiftRImm(Inst, Imm, 8);
720 static DecodeStatus DecodeVecShiftL64Imm(llvm::MCInst &Inst, unsigned Imm,
722   return DecodeVecShiftLImm(Inst, Imm, 64);
725 static DecodeStatus DecodeVecShiftL32Imm(llvm::MCInst &Inst, unsigned Imm,
727   return DecodeVecShiftLImm(Inst, Imm, 32);
730 static DecodeStatus DecodeVecShiftL16Imm(llvm::MCInst &Inst, unsigned Imm,
732   return DecodeVecShiftLImm(Inst, Imm, 16);
735 static DecodeStatus DecodeVecShiftL8Imm(llvm::MCInst &Inst, unsigned Imm,
737   return DecodeVecShiftLImm(Inst, Imm, 8);
740 static DecodeStatus DecodeThreeAddrSRegInstruction(llvm::MCInst &Inst,
749   switch (Inst.getOpcode()) {
771     DecodeGPR32RegisterClass(Inst, Rd, Addr, Decoder);
772     DecodeGPR32RegisterClass(Inst, Rn, Addr, Decoder);
773     DecodeGPR32RegisterClass(Inst, Rm, Addr, Decoder);
792     DecodeGPR64RegisterClass(Inst, Rd, Addr, Decoder);
793     DecodeGPR64RegisterClass(Inst, Rn, Addr, Decoder);
794     DecodeGPR64RegisterClass(Inst, Rm, Addr, Decoder);
798   Inst.addOperand(MCOperand::createImm(shift));
802 static DecodeStatus DecodeMoveImmInstruction(llvm::MCInst &Inst, uint32_t insn,
809   switch (Inst.getOpcode()) {
817     DecodeGPR32RegisterClass(Inst, Rd, Addr, Decoder);
822     DecodeGPR64RegisterClass(Inst, Rd, Addr, Decoder);
826   if (Inst.getOpcode() == AArch64::MOVKWi ||
827       Inst.getOpcode() == AArch64::MOVKXi)
828     Inst.addOperand(Inst.getOperand(0));
830   Inst.addOperand(MCOperand::createImm(imm));
831   Inst.addOperand(MCOperand::createImm(shift));
835 static DecodeStatus DecodeUnsignedLdStInstruction(llvm::MCInst &Inst,
844   switch (Inst.getOpcode()) {
849     Inst.addOperand(MCOperand::createImm(Rt));
859     DecodeGPR32RegisterClass(Inst, Rt, Addr, Decoder);
866     DecodeGPR64RegisterClass(Inst, Rt, Addr, Decoder);
870     DecodeFPR128RegisterClass(Inst, Rt, Addr, Decoder);
874     DecodeFPR64RegisterClass(Inst, Rt, Addr, Decoder);
878     DecodeFPR32RegisterClass(Inst, Rt, Addr, Decoder);
882     DecodeFPR16RegisterClass(Inst, Rt, Addr, Decoder);
886     DecodeFPR8RegisterClass(Inst, Rt, Addr, Decoder);
890   DecodeGPR64spRegisterClass(Inst, Rn, Addr, Decoder);
891   if (!Dis->tryAddingSymbolicOperand(Inst, offset, Addr, Fail, 0, 4))
892     Inst.addOperand(MCOperand::createImm(offset));
896 static DecodeStatus DecodeSignedLdStInstruction(llvm::MCInst &Inst,
909   switch (Inst.getOpcode()) {
958     DecodeGPR64spRegisterClass(Inst, Rn, Addr, Decoder);
962   switch (Inst.getOpcode()) {
967     Inst.addOperand(MCOperand::createImm(Rt));
1001     DecodeGPR32RegisterClass(Inst, Rt, Addr, Decoder);
1023     DecodeGPR64RegisterClass(Inst, Rt, Addr, Decoder);
1031     DecodeFPR128RegisterClass(Inst, Rt, Addr, Decoder);
1039     DecodeFPR64RegisterClass(Inst, Rt, Addr, Decoder);
1047     DecodeFPR32RegisterClass(Inst, Rt, Addr, Decoder);
1055     DecodeFPR16RegisterClass(Inst, Rt, Addr, Decoder);
1063     DecodeFPR8RegisterClass(Inst, Rt, Addr, Decoder);
1067   DecodeGPR64spRegisterClass(Inst, Rn, Addr, Decoder);
1068   Inst.addOperand(MCOperand::createImm(offset));
1081 static DecodeStatus DecodeExclusiveLdStInstruction(llvm::MCInst &Inst,
1089   unsigned Opcode = Inst.getOpcode();
1099     DecodeGPR32RegisterClass(Inst, Rs, Addr, Decoder);
1119     DecodeGPR32RegisterClass(Inst, Rt, Addr, Decoder);
1123     DecodeGPR32RegisterClass(Inst, Rs, Addr, Decoder);
1131     DecodeGPR64RegisterClass(Inst, Rt, Addr, Decoder);
1135     DecodeGPR32RegisterClass(Inst, Rs, Addr, Decoder);
1139     DecodeGPR32RegisterClass(Inst, Rt, Addr, Decoder);
1140     DecodeGPR32RegisterClass(Inst, Rt2, Addr, Decoder);
1144     DecodeGPR32RegisterClass(Inst, Rs, Addr, Decoder);
1148     DecodeGPR64RegisterClass(Inst, Rt, Addr, Decoder);
1149     DecodeGPR64RegisterClass(Inst, Rt2, Addr, Decoder);
1153   DecodeGPR64spRegisterClass(Inst, Rn, Addr, Decoder);
1164 static DecodeStatus DecodePairLdStInstruction(llvm::MCInst &Inst, uint32_t insn,
1178   unsigned Opcode = Inst.getOpcode();
1207     DecodeGPR64spRegisterClass(Inst, Rn, Addr, Decoder);
1227     DecodeGPR64RegisterClass(Inst, Rt, Addr, Decoder);
1228     DecodeGPR64RegisterClass(Inst, Rt2, Addr, Decoder);
1240     DecodeGPR32RegisterClass(Inst, Rt, Addr, Decoder);
1241     DecodeGPR32RegisterClass(Inst, Rt2, Addr, Decoder);
1251     DecodeFPR128RegisterClass(Inst, Rt, Addr, Decoder);
1252     DecodeFPR128RegisterClass(Inst, Rt2, Addr, Decoder);
1262     DecodeFPR64RegisterClass(Inst, Rt, Addr, Decoder);
1263     DecodeFPR64RegisterClass(Inst, Rt2, Addr, Decoder);
1273     DecodeFPR32RegisterClass(Inst, Rt, Addr, Decoder);
1274     DecodeFPR32RegisterClass(Inst, Rt2, Addr, Decoder);
1278   DecodeGPR64spRegisterClass(Inst, Rn, Addr, Decoder);
1279   Inst.addOperand(MCOperand::createImm(offset));
1293 static DecodeStatus DecodeAddSubERegInstruction(llvm::MCInst &Inst,
1305   switch (Inst.getOpcode()) {
1310     DecodeGPR32spRegisterClass(Inst, Rd, Addr, Decoder);
1311     DecodeGPR32spRegisterClass(Inst, Rn, Addr, Decoder);
1312     DecodeGPR32RegisterClass(Inst, Rm, Addr, Decoder);
1316     DecodeGPR32RegisterClass(Inst, Rd, Addr, Decoder);
1317     DecodeGPR32spRegisterClass(Inst, Rn, Addr, Decoder);
1318     DecodeGPR32RegisterClass(Inst, Rm, Addr, Decoder);
1322     DecodeGPR64spRegisterClass(Inst, Rd, Addr, Decoder);
1323     DecodeGPR64spRegisterClass(Inst, Rn, Addr, Decoder);
1324     DecodeGPR32RegisterClass(Inst, Rm, Addr, Decoder);
1328     DecodeGPR64RegisterClass(Inst, Rd, Addr, Decoder);
1329     DecodeGPR64spRegisterClass(Inst, Rn, Addr, Decoder);
1330     DecodeGPR32RegisterClass(Inst, Rm, Addr, Decoder);
1334     DecodeGPR64spRegisterClass(Inst, Rd, Addr, Decoder);
1335     DecodeGPR64spRegisterClass(Inst, Rn, Addr, Decoder);
1336     DecodeGPR64RegisterClass(Inst, Rm, Addr, Decoder);
1340     DecodeGPR64RegisterClass(Inst, Rd, Addr, Decoder);
1341     DecodeGPR64spRegisterClass(Inst, Rn, Addr, Decoder);
1342     DecodeGPR64RegisterClass(Inst, Rm, Addr, Decoder);
1346   Inst.addOperand(MCOperand::createImm(extend));
1350 static DecodeStatus DecodeLogicalImmInstruction(llvm::MCInst &Inst,
1359     if (Inst.getOpcode() == AArch64::ANDSXri)
1360       DecodeGPR64RegisterClass(Inst, Rd, Addr, Decoder);
1362       DecodeGPR64spRegisterClass(Inst, Rd, Addr, Decoder);
1363     DecodeGPR64RegisterClass(Inst, Rn, Addr, Decoder);
1368     if (Inst.getOpcode() == AArch64::ANDSWri)
1369       DecodeGPR32RegisterClass(Inst, Rd, Addr, Decoder);
1371       DecodeGPR32spRegisterClass(Inst, Rd, Addr, Decoder);
1372     DecodeGPR32RegisterClass(Inst, Rn, Addr, Decoder);
1377   Inst.addOperand(MCOperand::createImm(imm));
1381 static DecodeStatus DecodeModImmInstruction(llvm::MCInst &Inst, uint32_t insn,
1389   if (Inst.getOpcode() == AArch64::MOVID)
1390     DecodeFPR64RegisterClass(Inst, Rd, Addr, Decoder);
1392     DecodeVectorRegisterClass(Inst, Rd, Addr, Decoder);
1394   Inst.addOperand(MCOperand::createImm(imm));
1396   switch (Inst.getOpcode()) {
1407     Inst.addOperand(MCOperand::createImm((cmode & 6) << 2));
1413     Inst.addOperand(MCOperand::createImm(cmode & 1 ? 0x110 : 0x108));
1420 static DecodeStatus DecodeModImmTiedInstruction(llvm::MCInst &Inst,
1429   DecodeVectorRegisterClass(Inst, Rd, Addr, Decoder);
1430   DecodeVectorRegisterClass(Inst, Rd, Addr, Decoder);
1432   Inst.addOperand(MCOperand::createImm(imm));
1433   Inst.addOperand(MCOperand::createImm((cmode & 6) << 2));
1438 static DecodeStatus DecodeAdrInstruction(llvm::MCInst &Inst, uint32_t insn,
1450   DecodeGPR64RegisterClass(Inst, Rd, Addr, Decoder);
1451   if (!Dis->tryAddingSymbolicOperand(Inst, imm, Addr, Fail, 0, 4))
1452     Inst.addOperand(MCOperand::createImm(imm));
1457 static DecodeStatus DecodeBaseAddSubImm(llvm::MCInst &Inst, uint32_t insn,
1475       DecodeGPR64spRegisterClass(Inst, Rd, Addr, Decoder);
1477       DecodeGPR64RegisterClass(Inst, Rd, Addr, Decoder);
1478     DecodeGPR64spRegisterClass(Inst, Rn, Addr, Decoder);
1481       DecodeGPR32spRegisterClass(Inst, Rd, Addr, Decoder);
1483       DecodeGPR32RegisterClass(Inst, Rd, Addr, Decoder);
1484     DecodeGPR32spRegisterClass(Inst, Rn, Addr, Decoder);
1487   if (!Dis->tryAddingSymbolicOperand(Inst, Imm, Addr, Fail, 0, 4))
1488     Inst.addOperand(MCOperand::createImm(ImmVal));
1489   Inst.addOperand(MCOperand::createImm(12 * ShifterVal));
1493 static DecodeStatus DecodeUnconditionalBranch(llvm::MCInst &Inst, uint32_t insn,
1504   if (!Dis->tryAddingSymbolicOperand(Inst, imm * 4, Addr, true, 0, 4))
1505     Inst.addOperand(MCOperand::createImm(imm));
1510 static DecodeStatus DecodeSystemPStateInstruction(llvm::MCInst &Inst,
1523   Inst.addOperand(MCOperand::createImm(pstate_field));
1524   Inst.addOperand(MCOperand::createImm(crm));
1535 static DecodeStatus DecodeTestAndBranch(llvm::MCInst &Inst, uint32_t insn,
1549     DecodeGPR32RegisterClass(Inst, Rt, Addr, Decoder);
1551     DecodeGPR64RegisterClass(Inst, Rt, Addr, Decoder);
1552   Inst.addOperand(MCOperand::createImm(bit));
1553   if (!Dis->tryAddingSymbolicOperand(Inst, dst * 4, Addr, true, 0, 4))
1554     Inst.addOperand(MCOperand::createImm(dst));
1559 static DecodeStatus DecodeGPRSeqPairsClassRegisterClass(MCInst &Inst,
1569   Inst.addOperand(MCOperand::createReg(Register));
1573 static DecodeStatus DecodeWSeqPairsClassRegisterClass(MCInst &Inst,
1577   return DecodeGPRSeqPairsClassRegisterClass(Inst,
1582 static DecodeStatus DecodeXSeqPairsClassRegisterClass(MCInst &Inst,
1586   return DecodeGPRSeqPairsClassRegisterClass(Inst,