Target/AArch64/AArch64InstrInfo.cpp

1 //===- AArch64InstrInfo.cpp - AArch64 Instruction Information -------------===//
14 #include "AArch64InstrInfo.h"
31 AArch64InstrInfo::AArch64InstrInfo(const AArch64Subtarget &STI)
37 unsigned AArch64InstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const {
92 bool AArch64InstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
179 bool AArch64InstrInfo::ReverseBranchCondition(
220 unsigned AArch64InstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
245 void AArch64InstrInfo::instantiateCondBranch(
262 unsigned AArch64InstrInfo::InsertBranch(
360 bool AArch64InstrInfo::canInsertSelect(
401 void AArch64InstrInfo::insertSelect(MachineBasicBlock &MBB,
545 bool AArch64InstrInfo::isAsCheapAsAMove(const MachineInstr *MI) const {
594 bool AArch64InstrInfo::isCoalescableExtInstr(const MachineInstr &MI,
615 AArch64InstrInfo::areMemAccessesTriviallyDisjoint(MachineInstr *MIa,
651 bool AArch64InstrInfo::analyzeCompare(const MachineInstr *MI, unsigned &SrcReg,
827 bool AArch64InstrInfo::optimizeCompareInstr(
986 AArch64InstrInfo::expandPostRAPseudo(MachineBasicBlock::iterator MI) const {
1036 bool AArch64InstrInfo::hasShiftedReg(const MachineInstr *MI) const {
1082 bool AArch64InstrInfo::hasExtendedReg(const MachineInstr *MI) const {
1110 bool AArch64InstrInfo::isGPRZero(const MachineInstr *MI) const {
1134 bool AArch64InstrInfo::isGPRCopy(const MachineInstr *MI) const {
1164 bool AArch64InstrInfo::isFPRCopy(const MachineInstr *MI) const {
1185 unsigned AArch64InstrInfo::isLoadFromStackSlot(const MachineInstr *MI,
1208 unsigned AArch64InstrInfo::isStoreToStackSlot(const MachineInstr *MI,
1233 bool AArch64InstrInfo::isScaledAddr(const MachineInstr *MI) const {
1292 bool AArch64InstrInfo::isLdStPairSuppressed(const MachineInstr *MI) const {
1305 void AArch64InstrInfo::suppressLdStPair(MachineInstr *MI) const {
1316 AArch64InstrInfo::getMemOpBaseRegImmOfs(MachineInstr *LdSt, unsigned &BaseReg,
1342 bool AArch64InstrInfo::getMemOpBaseRegImmOfsWidth(
1433 bool AArch64InstrInfo::shouldClusterLoads(MachineInstr *FirstLdSt,
1451 bool AArch64InstrInfo::shouldScheduleAdjacent(MachineInstr *First,
1492 MachineInstr *AArch64InstrInfo::emitFrameIndexDebugValue(
1523 void AArch64InstrInfo::copyPhysRegTuple(
1549 void AArch64InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
1831 void AArch64InstrInfo::storeRegToStackSlot(
1929 void AArch64InstrInfo::loadRegFromStackSlot(
2084 MachineInstr *AArch64InstrInfo::foldMemoryOperandImpl(
2359                                     const AArch64InstrInfo *TII) {
2392 void AArch64InstrInfo::getNoopForMachoTarget(MCInst &NopInst) const {
2397 bool AArch64InstrInfo::useMachineCombiner() const {
2494 bool AArch64InstrInfo::isAssociativeAndCommutative(const MachineInstr &Inst) const {
2629 bool AArch64InstrInfo::getMachineCombinerPatterns(
2736 void AArch64InstrInfo::genAlternativeCodeSequence(
2946 bool AArch64InstrInfo::optimizeCondBranch(MachineInstr *MI) const {
3024 AArch64InstrInfo::decomposeMachineOperandsTargetFlags(unsigned TF) const {
3030 AArch64InstrInfo::getSerializableDirectMachineOperandTargetFlags() const {
3044 AArch64InstrInfo::getSerializableBitmaskMachineOperandTargetFlags() const {