Target/AArch64/AArch64ISelLowering.cpp

7367                                  TargetLowering::DAGCombinerInfo &DCI,
7369   if (DCI.isBeforeLegalizeOps())
7418                                  TargetLowering::DAGCombinerInfo &DCI,
7420   if (DCI.isBeforeLegalizeOps())
7715                                 TargetLowering::DAGCombinerInfo &DCI) {
7716   SelectionDAG &DAG = DCI.DAG;
7755                                 TargetLowering::DAGCombinerInfo &DCI) {
7757   SelectionDAG &DAG = DCI.DAG;
7801 static SDValue performORCombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI,
7806   SelectionDAG &DAG = DCI.DAG;
7812   SDValue Res = tryCombineToEXTR(N, DCI);
7816   Res = tryCombineToBSL(N, DCI);
7824                                      TargetLowering::DAGCombinerInfo &DCI,
7828   if (DCI.isBeforeLegalizeOps())
7890                                            TargetLowering::DAGCombinerInfo &DCI,
7931   if (DCI.isBeforeLegalizeOps())
7971                                            TargetLowering::DAGCombinerInfo &DCI,
7975   if (DCI.isBeforeLegalizeOps())
8215                                         TargetLowering::DAGCombinerInfo &DCI,
8217   if (DCI.isBeforeLegalizeOps())
8264                                        TargetLowering::DAGCombinerInfo &DCI,
8266   if (DCI.isBeforeLegalizeOps())
8379                                        TargetLowering::DAGCombinerInfo &DCI,
8381   SelectionDAG &DAG = DCI.DAG;
8388     return tryCombineFixedPointConvert(N, DCI, DAG);
8417     return tryCombineLongOpWithDup(IID, N, DCI, DAG);
8435                                     TargetLowering::DAGCombinerInfo &DCI,
8441   if (!DCI.isBeforeLegalizeOps() && N->getOpcode() == ISD::ZERO_EXTEND &&
8447       SDValue NewABD = tryCombineLongOpWithDup(IID, ABDNode, DCI, DAG);
8480   if (!DCI.isBeforeLegalizeOps())
8592 static SDValue split16BStores(SDNode *N, TargetLowering::DAGCombinerInfo &DCI,
8595   if (!DCI.isBeforeLegalize())
8661                                      TargetLowering::DAGCombinerInfo &DCI,
8663   if (DCI.isBeforeLegalizeOps())
8666   SelectionDAG &DAG = DCI.DAG;
8747     DCI.CombineTo(LD, NewResults);
8748     DCI.CombineTo(N, SDValue(UpdN.getNode(), 0));     // Dup/Inserted Result
8749     DCI.CombineTo(User, SDValue(UpdN.getNode(), 1));  // Write back register
8759                                      TargetLowering::DAGCombinerInfo &DCI,
8763   TargetLowering::TargetLoweringOpt TLO(DAG, DCI.isBeforeLegalize(),
8764                                         DCI.isBeforeLegalizeOps());
8767     DCI.CommitTargetLoweringOpt(TLO);
8774                                    TargetLowering::DAGCombinerInfo &DCI,
8777   SDValue Split = split16BStores(N, DCI, DAG, Subtarget);
8782       performTBISimplification(N->getOperand(2), DCI, DAG))
9052                                           TargetLowering::DAGCombinerInfo &DCI,
9054   if (DCI.isBeforeLegalize() || DCI.isCalledByLegalizer())
9173     DCI.CombineTo(N, NewResults);
9174     DCI.CombineTo(User, SDValue(UpdN.getNode(), NumResultVecs));
9368                            TargetLowering::DAGCombinerInfo &DCI,
9442                                     TargetLowering::DAGCombinerInfo &DCI,
9444   SDValue NV = performCONDCombine(N, DCI, DAG, 2, 3);
9492   DCI.CombineTo(N, BR, false);
9569                                  TargetLowering::DAGCombinerInfo &DCI,
9629                                     TargetLowering::DAGCombinerInfo &DCI) {
9630   SelectionDAG &DAG = DCI.DAG;
9667   assert(DCI.isBeforeLegalize() ||
9697                                                  DAGCombinerInfo &DCI) const {
9698   SelectionDAG &DAG = DCI.DAG;
9704     return performAddSubLongCombine(N, DCI, DAG);
9706     return performXorCombine(N, DAG, DCI, Subtarget);
9708     return performMulCombine(N, DAG, DCI, Subtarget);
9718     return performORCombine(N, DCI, Subtarget);
9720     return performIntrinsicCombine(N, DCI, Subtarget);
9724     return performExtendCombine(N, DCI, DAG);
9726     return performBitcastCombine(N, DCI, DAG);
9728     return performConcatVectorsCombine(N, DCI, DAG);
9730     SDValue RV = performSelectCombine(N, DCI);
9736     return performVSelectCombine(N, DCI.DAG);
9738     if (performTBISimplification(N->getOperand(1), DCI, DAG))
9742     return performSTORECombine(N, DCI, DAG, Subtarget);
9744     return performBRCONDCombine(N, DCI, DAG);
9747     return performTBZCombine(N, DCI, DAG);
9749     return performCONDCombine(N, DCI, DAG, 2, 3);
9751     return performPostLD1Combine(N, DCI, false);
9755     return performPostLD1Combine(N, DCI, true);
9782       return performNEONPostLDSTCombine(N, DCI, DAG);