Lines Matching defs:Srl_imm
1459 uint64_t Srl_imm = 0;
1462 isOpcWithIntImmediate(Op0->getOperand(0).getNode(), ISD::SRL, Srl_imm)) {
1470 Srl_imm)) {
1476 } else if (isOpcWithIntImmediate(Op0, ISD::SRL, Srl_imm)) {
1490 if (!BiggerPattern && (Srl_imm <= 0 || Srl_imm >= VT.getSizeInBits())) {
1496 LSB = Srl_imm;
1497 MSB = Srl_imm + (VT == MVT::i32 ? countTrailingOnes<uint32_t>(And_imm)
1525 // UBFM Value, ShiftImm, BitWide + Srl_imm -1
1537 uint64_t Srl_imm = 0;
1538 if (!isIntImmediate(N->getOperand(1), Srl_imm))
1542 unsigned BitWide = 64 - countLeadingOnes(~(And_mask >> Srl_imm));
1543 if (BitWide && isMask_64(And_mask >> Srl_imm)) {
1549 LSB = Srl_imm;
1550 MSB = BitWide + Srl_imm - 1;
1606 uint64_t Srl_imm = 0;
1607 if (!isIntImmediate(N->getOperand(1), Srl_imm))
1610 assert(Srl_imm > 0 && Srl_imm < VT.getSizeInBits() &&
1612 int immr = Srl_imm - Shl_imm;