Lines Matching refs:emitIntExt
189 unsigned emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt);
1139 LHSReg = emitIntExt(SrcVT, LHSReg, RetVT, IsZExt);
1237 RHSReg = emitIntExt(SrcVT, RHSReg, RetVT, IsZExt);
2252 SrcReg = emitIntExt(VT, SrcReg, MVT::i32, /*IsZExt=*/true);
2769 emitIntExt(SrcVT.getSimpleVT(), SrcReg, MVT::i32, /*isZExt*/ !Signed);
2935 ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/false);
2945 ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/true);
3716 SrcReg = emitIntExt(RVVT, SrcReg, DestVT, IsZExt);
3928 return emitIntExt(SrcVT, Op0, RetVT, IsZExt);
4035 return emitIntExt(SrcVT, Op0, RetVT, IsZExt);
4073 Op0 = emitIntExt(SrcVT, Op0, RetVT, IsZExt);
4118 Op0Reg = emitIntExt(RetVT, Op0Reg, MVT::i32, /*IsZExt=*/false);
4156 return emitIntExt(SrcVT, Op0, RetVT, IsZExt);
4211 unsigned AArch64FastISel::emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT,
4419 unsigned ResultReg = emitIntExt(SrcVT, SrcReg, RetVT, IsZExt);
4797 IdxN = emitIntExt(IdxVT.getSimpleVT(), IdxN, PtrVT, /*IsZExt=*/false);