lib/CodeGen/SplitKit.cpp

362 VNInfo *SplitEditor::defValue(unsigned RegIdx,
368   LiveInterval *LI = &LIS.getInterval(Edit->get(RegIdx));
375     Values.insert(std::make_pair(std::make_pair(RegIdx, ParentVNI->id),
378   // This was the first time (RegIdx, ParentVNI) was mapped.
398 void SplitEditor::forceRecompute(unsigned RegIdx, const VNInfo *ParentVNI) {
400   ValueForcePair &VFP = Values[std::make_pair(RegIdx, ParentVNI->id)];
413   LiveInterval *LI = &LIS.getInterval(Edit->get(RegIdx));
419 VNInfo *SplitEditor::defFromParent(unsigned RegIdx,
426   LiveInterval *LI = &LIS.getInterval(Edit->get(RegIdx));
429   // so always begin RegIdx 0 early and all others late.
430   bool Late = RegIdx != 0;
447   return defValue(RegIdx, ParentVNI, Def);
652     unsigned RegIdx = AssignI.value();
654       DEBUG(dbgs() << "  cannot find simple kill of RegIdx " << RegIdx << '\n');
655       forceRecompute(RegIdx, Edit->getParent().getVNInfoAt(Def));
719   // Get the complement interval, always RegIdx 0.
825     // RegAssign has holes where RegIdx 0 should be used.
829       unsigned RegIdx;
832         RegIdx = 0;
834         RegIdx = AssignI.value();
840         RegIdx = 0;
844       // The interval [Start;End) is continuously mapped to RegIdx, ParentVNI.
845       DEBUG(dbgs() << " [" << Start << ';' << End << ")=" << RegIdx);
846       LiveRange &LR = LIS.getInterval(Edit->get(RegIdx));
849       ValueForcePair VFP = Values.lookup(std::make_pair(RegIdx, ParentVNI->id));
865       LiveRangeCalc &LRC = getLRCalc(RegIdx);
867       // This value has multiple defs in RegIdx, but it wasn't rematerialized,
931     unsigned RegIdx = RegAssign.lookup(PHIVNI->def);
932     LiveRange &LR = LIS.getInterval(Edit->get(RegIdx));
933     LiveRangeCalc &LRC = getLRCalc(RegIdx);
942         assert(RegAssign.lookup(LastUse) == RegIdx &&
972     unsigned RegIdx = RegAssign.lookup(Idx);
973     LiveInterval *LI = &LIS.getInterval(Edit->get(RegIdx));
976                  << Idx << ':' << RegIdx << '\t' << *MI);
994     getLRCalc(RegIdx).extend(*LI, Idx.getNextSlot());
1034     unsigned RegIdx = RegAssign.lookup(ParentVNI->def);
1035     defValue(RegIdx, ParentVNI, ParentVNI->def);