CodeGen/SelectionDAG/LegalizeDAG.cpp

364       // Load one integer register's worth from the stack slot.
365       SDValue Load = DAG.getLoad(RegVT, dl, Store, StackPtr,
369       Stores.push_back(DAG.getStore(Load.getValue(1), dl, Load, Ptr,
386     // Load from the stack slot.
387     SDValue Load = DAG.getExtLoad(ISD::EXTLOAD, dl, RegVT, Store, StackPtr,
391     Stores.push_back(DAG.getTruncStore(Load.getValue(1), dl, Load, Ptr,
486       // Load one integer register's worth from the original location.
487       SDValue Load = DAG.getLoad(RegVT, dl, Chain, Ptr,
494       Stores.push_back(DAG.getStore(Load.getValue(1), dl, Load, StackPtr,
506     SDValue Load = DAG.getExtLoad(ISD::EXTLOAD, dl, RegVT, Chain, Ptr,
516     Stores.push_back(DAG.getTruncStore(Load.getValue(1), dl, Load, StackPtr,
524     Load = DAG.getExtLoad(LD->getExtensionType(), dl, VT, TF, StackBase,
529     ValResult = Load;
551   // Load the value in two parts
634   // Load the updated vector.
944       assert(RVal.getNode() != Node && "Load must be completely replaced");
1016            "Load size not an integral number of bytes!");
1025       // Load the bottom RoundWidth bits.
1031       // Load the remaining ExtraWidth bits.
1057       // Load the top RoundWidth bits.
1062       // Load the remaining ExtraWidth bits.
1132           SDValue Load = DAG.getExtLoad(MidExtType, dl, LoadVT, Chain, Ptr,
1136           Value = DAG.getNode(ExtendOp, dl, Node->getValueType(0), Load);
1137           Chain = Load.getValue(1);
1190     assert(Value.getNode() != Node && "Load must be completely replaced");
1677     // Load out a legal integer with the same sign bit as the float.
2587     SDValue Load = DAG.getLoad(MVT::f64, dl, Store2, StackSlot,
2595     SDValue Sub = DAG.getNode(ISD::FSUB, dl, MVT::f64, Load, Bias);
2739     SDValue Load = DAG.getExtLoad(
2743     HandleSDNode Handle(Load);
2744     LegalizeOp(Load.getNode());