Lines Matching defs:LaneMask

93     /// A LaneMask to remember on which subregister live ranges we need to call
163 /// LaneMask are split as necessary. @p LaneMask are the lanes that
167 LaneBitmask LaneMask, CoalescerPair &CP);
172 LaneBitmask LaneMask, const CoalescerPair &CP);
804 LaneBitmask AMask = SA.LaneMask;
806 LaneBitmask BMask = SB.LaneMask;
816 SB.LaneMask = BRest;
823 SB.LaneMask = Common;
1102 if ((SR.LaneMask & SrcMask) == 0)
1123 if ((SR.LaneMask & DstMask) == 0)
1145 if ((SR.LaneMask & UseMask) == 0)
1216 if ((S.LaneMask & Mask) == 0)
1436 if ((S.LaneMask & ShrinkMask) == 0)
1438 DEBUG(dbgs() << "Shrink LaneUses (Lane " << PrintLaneMask(S.LaneMask)
1635 /// The LaneMask that this liverange will occupy the coalesced register. May
1637 const LaneBitmask LaneMask;
1789 JoinVals(LiveRange &LR, unsigned Reg, unsigned SubIdx, LaneBitmask LaneMask,
1793 : LR(LR), Reg(Reg), SubIdx(SubIdx), LaneMask(LaneMask),
1872 LaneBitmask SMask = TRI->composeSubRegIndexLaneMask(SubIdx, S.LaneMask);
1873 if ((SMask & LaneMask) == 0)
2394 DEBUG(dbgs() << "\t\tPrune sublane " << PrintLaneMask(S.LaneMask)
2405 DEBUG(dbgs() << "\t\tDead uses at sublane " << PrintLaneMask(S.LaneMask)
2407 ShrinkMask |= S.LaneMask;
2471 LaneBitmask LaneMask,
2474 JoinVals RHSVals(RRange, CP.getSrcReg(), CP.getSrcIdx(), LaneMask,
2476 JoinVals LHSVals(LRange, CP.getDstReg(), CP.getDstIdx(), LaneMask,
2527 LaneBitmask LaneMask,
2531 LaneBitmask RMask = R.LaneMask;
2532 // LaneMask of subregisters common to subrange R and ToMerge.
2533 LaneBitmask Common = RMask & LaneMask;
2540 // LaneMask of subregisters contained in the R range but not in ToMerge,
2542 LaneBitmask LRest = RMask & ~LaneMask;
2545 R.LaneMask = LRest;
2551 R.LaneMask = Common;
2556 LaneMask &= ~RMask;
2559 if (LaneMask != 0) {
2560 DEBUG(dbgs() << "\t\tNew Lane " << PrintLaneMask(LaneMask) << '\n');
2561 LI.createSubRangeFrom(Allocator, LaneMask, ToMerge);
2604 LaneBitmask Mask = TRI->composeSubRegIndexLaneMask(DstIdx, R.LaneMask);
2605 R.LaneMask = Mask;
2620 LaneBitmask Mask = TRI->composeSubRegIndexLaneMask(SrcIdx, R.LaneMask);
2969 assert((S.LaneMask & ~MaxMask) == 0);