config/mips/mips.c

1478 	  && mips_regno_mode_ok_for_base_p (REGNO (x), mode, strict));
2379       && REG_P (src) && MD_REG_P (REGNO (src))
2380       && REG_P (dest) && GP_REG_P (REGNO (dest)))
2382       int other_regno = REGNO (src) == HI_REGNUM ? LO_REGNUM : HI_REGNUM;
2384 	emit_insn (gen_mfhilo_si (gen_rtx_REG (SImode, REGNO (dest)),
2385 				  gen_rtx_REG (SImode, REGNO (src)),
2388 	emit_insn (gen_mfhilo_di (gen_rtx_REG (DImode, REGNO (dest)),
2389 				  gen_rtx_REG (DImode, REGNO (src)),
2787       if (FP_REG_P (REGNO (op)))
2788 	return gen_rtx_REG (word_mode, high_p ? REGNO (op) + 1 : REGNO (op));
2789       if (ACC_HI_REG_P (REGNO (op)))
2790 	return gen_rtx_REG (word_mode, high_p ? REGNO (op) : REGNO (op) + 1);
2894   if ((src_code == REG && GP_REG_P (REGNO (src)))
2899 	  if (GP_REG_P (REGNO (dest)))
2902 	  if (MD_REG_P (REGNO (dest)))
2905 	  if (DSP_ACC_REG_P (REGNO (dest)))
2908 	      retval[2] = reg_names[REGNO (dest)][4];
2909 	      retval[3] = reg_names[REGNO (dest)][5];
2913 	  if (FP_REG_P (REGNO (dest)))
2916 	  if (ALL_COP_REG_P (REGNO (dest)))
2920 	      retval[4] = COPNUM_AS_CHAR_FROM_REGNUM (REGNO (dest));
2927   if (dest_code == REG && GP_REG_P (REGNO (dest)))
2931 	  if (DSP_ACC_REG_P (REGNO (src)))
2934 	      retval[2] = reg_names[REGNO (src)][4];
2935 	      retval[3] = reg_names[REGNO (src)][5];
2939 	  if (ST_REG_P (REGNO (src)) && ISA_HAS_8CC)
2942 	  if (FP_REG_P (REGNO (src)))
2945 	  if (ALL_COP_REG_P (REGNO (src)))
2949 	      retval[4] = COPNUM_AS_CHAR_FROM_REGNUM (REGNO (src));
2980   if (src_code == REG && FP_REG_P (REGNO (src)))
2982       if (dest_code == REG && FP_REG_P (REGNO (dest)))
2993   if (dest_code == REG && FP_REG_P (REGNO (dest)))
2998   if (dest_code == REG && ALL_COP_REG_P (REGNO (dest)) && src_code == MEM)
3003       retval[3] = COPNUM_AS_CHAR_FROM_REGNUM (REGNO (dest));
3006   if (dest_code == MEM && src_code == REG && ALL_COP_REG_P (REGNO (src)))
3011       retval[3] = COPNUM_AS_CHAR_FROM_REGNUM (REGNO (src));
3506   fp1 = gen_rtx_REG (SFmode, REGNO (scratch));
3507   fp2 = gen_rtx_REG (SFmode, REGNO (scratch) + FP_INC);
5648       regnum = REGNO (op);
5662 	regnum = REGNO (op);
5751 	fprintf (file, "(%s)", reg_names[REGNO (addr.reg)]);
5756 	fprintf (file, "(%s)", reg_names[REGNO (addr.reg)]);
6307 /* Return true if the current function must save REGNO.  */
6587 /* Use FN to save or restore register REGNO.  MODE is the register's
6830   if (REGNO (reg) == GP_REG_FIRST + 31
6862 	  && REGNO (reg) != GP_REG_FIRST + 31
6863 	  && !M16_REG_P (REGNO (reg)))
6887     REGNO (pic_offset_table_rtx) = cfun->machine->global_pointer;
6997   REGNO (pic_offset_table_rtx) = GLOBAL_POINTER_REGNUM;
7030   if (TARGET_MIPS16 && REGNO (reg) == GP_REG_FIRST + 31)
7033   if (TARGET_MIPS16 && !M16_REG_P (REGNO (reg)))
7212       = REGNO (pic_offset_table_rtx)
7276       if (TARGET_ABICALLS && REGNO (temp1) != PIC_FUNCTION_ADDR_REGNUM)
8710   for (i = 0; i < HARD_REGNO_NREGS (REGNO (reg), GET_MODE (reg)); i++)
8711     if (state->last_set[REGNO (reg) + i].insn != 0)
8715 	t = state->last_set[REGNO (reg) + i].time;
8716 	t += insn_latency (state->last_set[REGNO (reg) + i].insn, insn);
8786     for (i = 0; i < HARD_REGNO_NREGS (REGNO (x), GET_MODE (x)); i++)
8788 	state->last_set[REGNO (x) + i].insn = mips_sim_insn;
8789 	state->last_set[REGNO (x) + i].time = state->time;