Lines Matching refs:POWER
246 /* The FL1 field in a POWER SC form instruction. */
252 /* The FL2 field in a POWER SC form instruction. */
293 /* The LEV field in a POWER SVC form instruction. */
460 /* The SV field in a POWER SC form instruction. */
1630 #define POWER PPC_OPCODE_POWER
2556 { "svc", SC(17,0,0), SC_MASK, POWER, { SVC_LEV, FL1, FL2 } },
2557 { "svcl", SC(17,0,1), SC_MASK, POWER, { SVC_LEV, FL1, FL2 } },
2559 { "svcla", SC(17,1,1), SC_MASK, POWER, { SV } },
2800 { "rfsvc", XL(19,82), 0xffffffff, POWER, { 0 } },
3247 { "clf", X(31,118), XTO_MASK, POWER, { RA, RB } },
3446 { "tlbi", X(31,306), XRT_MASK, POWER, { RA0, RB } },
3508 { "mftid", XSPR(31,339,17), XSPR_MASK, POWER, { RT } },
3511 { "mfsdr0", XSPR(31,339,24), XSPR_MASK, POWER, { RT } },
3835 { "mttid", XSPR(31,467,17), XSPR_MASK, POWER, { RS } },
3841 { "mtsdr0", XSPR(31,467,24), XSPR_MASK, POWER, { RS } },
4022 { "cli", X(31,502), XRB_MASK, POWER, { RT, RA } },
4276 /* New VSX opcodes in POWER ISA 2.06 */