gas/config/tc-mips.c

204   /* MIPS ISA (Instruction Set Architecture) level.  This is set to -1
276 /* MIPS ISA we are using for this output file.  */
347 /*  Return true if ISA supports 64 bit wide gp registers.  */
348 #define ISA_HAS_64BIT_REGS(ISA)		\
349   ((ISA) == ISA_MIPS3			\
350    || (ISA) == ISA_MIPS4		\
351    || (ISA) == ISA_MIPS5		\
352    || (ISA) == ISA_MIPS64		\
353    || (ISA) == ISA_MIPS64R2)
355 /*  Return true if ISA supports 64 bit wide float registers.  */
356 #define ISA_HAS_64BIT_FPRS(ISA)		\
357   ((ISA) == ISA_MIPS3			\
358    || (ISA) == ISA_MIPS4		\
359    || (ISA) == ISA_MIPS5		\
360    || (ISA) == ISA_MIPS32R2		\
361    || (ISA) == ISA_MIPS64		\
362    || (ISA) == ISA_MIPS64R2)
364 /* Return true if ISA supports 64-bit right rotate (dror et al.)
366 #define ISA_HAS_DROR(ISA)		\
367   ((ISA) == ISA_MIPS64R2)
369 /* Return true if ISA supports 32-bit right rotate (ror et al.)
371 #define ISA_HAS_ROR(ISA)		\
372   ((ISA) == ISA_MIPS32R2		\
373    || (ISA) == ISA_MIPS64R2		\
376 /* Return true if ISA supports ins instructions. */
377 #define ISA_HAS_INS(ISA)		\
378   ((ISA) == ISA_MIPS32R2		\
379   || (ISA) == ISA_MIPS64R2)
381 /* Return true if ISA supports single-precision floats in odd registers.  */
382 #define ISA_HAS_ODD_SINGLE_FPR(ISA)	\
383   ((ISA) == ISA_MIPS32			\
384    || (ISA) == ISA_MIPS32R2		\
385    || (ISA) == ISA_MIPS64		\
386    || (ISA) == ISA_MIPS64R2)
388 /* Return true if ISA supports move to/from high part of a 64-bit
390 #define ISA_HAS_MXHC1(ISA)		\
391   ((ISA) == ISA_MIPS32R2		\
392    || (ISA) == ISA_MIPS64R2)
457    earlier-ISA CPUs for which CPU documentation declares that the
474    INSN_LOAD_MEMORY_DELAY.  These nops are only required at MIPS ISA
485    INSN_READ_COND_CODE.  These nops are only required at MIPS ISA
499    requires at MIPS ISA level I.  */
1076 /* Table and functions used to map between CPU/ISA names, and
1077    ISA levels, and CPU numbers.  */
1081   const char *name;           /* CPU or ISA name.  */
1082   int flags;                  /* ASEs available, or ISA flag.  */
1083   int isa;                    /* ISA level.  */
1084   int cpu;                    /* CPU number (default CPU if ISA).  */
1087 #define MIPS_CPU_IS_ISA		0x0001	/* Is this an ISA?  (If 0, a CPU.) */
2653      we want to use ISA-encoded addresses, so we pass -1 for an
11736 /* Set up globals to generate code for the ISA or processor
11789 	 ISA level specified by -mipsN, while arch_info->isa contains
11794 	     There's no harm in specifying both as long as the ISA levels
11826 	 it agrees with the ABI and ISA.  */
11867        agrees with the ABI and ISA.  */
11891     as_bad (_("trap exception not supported at ISA 1"));
11912       as_warn ("%s ISA does not support SmartMIPS",
11918       as_warn ("%s ISA does not support DSP ASE",
11927       as_warn ("%s ISA does not support DSP R2 ASE",
11933       as_warn ("%s ISA does not support MT ASE",
12817 	as_warn ("%s ISA does not support SmartMIPS ASE",
12834 	as_warn ("%s ISA does not support DSP ASE",
12847 	as_warn ("%s ISA does not support DSP R2 ASE",
12860 	as_warn ("%s ISA does not support MT ASE",
12870       /* Permit the user to change the ISA and architecture on the fly.
12897 	    as_bad (_("unknown ISA level %s"), name + 4);
12905 	as_bad (_("unknown ISA or architecture %s"), name);
12927 	  as_bad (_("unknown ISA level %s"), name + 4);
15277 /* Return the canonical processor information for ISA (a member of the
15346 -mips1			generate MIPS ISA I instructions\n\
15347 -mips2			generate MIPS ISA II instructions\n\
15348 -mips3			generate MIPS ISA III instructions\n\
15349 -mips4			generate MIPS ISA IV instructions\n\
15350 -mips5                  generate MIPS ISA V instructions\n\
15351 -mips32                 generate MIPS32 ISA instructions\n\
15352 -mips32r2               generate MIPS32 release 2 ISA instructions\n\
15353 -mips64                 generate MIPS64 ISA instructions\n\
15354 -mips64r2               generate MIPS64 release 2 ISA instructions\n\
15395 -mgp32			use 32-bit GPRs, regardless of the chosen ISA\n\
15396 -mfp32			use 32-bit FPRs, regardless of the chosen ISA\n\