gas/config/tc-i386.c

134     unsigned int types[MAX_OPERANDS];
344    different types of jumps add different sizes to frags when we're
1375       pt (x->types[i]);
1377       if (x->types[i]
1380       if (x->types[i] & Imm)
1382       if (x->types[i] & Disp)
1755       && !((i.types[0] & Imm) && (i.types[1] & Imm)))
1769      making sure the overlap of the given operands types is consistent
1770      with the template operand types.  */
1821   if (i.types[0] & Imm1)
1823   if (i.types[0] & ImplicitRegister)
1825   if (i.types[1] & ImplicitRegister)
1827   if (i.types[2] & ImplicitRegister)
1861       i.types[i.operands++] = Imm8;
1903   if (((i.types[0] & Reg8) != 0
1905       || ((i.types[1] & Reg8) != 0
1907       || (((i.types[0] & Reg8) != 0 || (i.types[1] & Reg8) != 0)
1916 	  if ((i.types[x] & Reg8) != 0
2285   temp_type = i.types[xchg2];
2286   i.types[xchg2] = i.types[xchg1];
2287   i.types[xchg1] = temp_type;
2337 	if (i.types[op] & Reg)
2339 	    if (i.types[op] & Reg8)
2341 	    else if (i.types[op] & Reg16)
2343 	    else if (i.types[op] & Reg32)
2345 	    else if (i.types[op] & Reg64)
2354     if (i.types[op] & Imm)
2363 		i.types[op] |= Imm32 | Imm64;
2366 		i.types[op] |= Imm16 | Imm32S | Imm32 | Imm64;
2369 		i.types[op] |= Imm16 | Imm8 | Imm8S | Imm32S | Imm32 | Imm64;
2378 	    if ((i.types[op] & Imm16)
2384 	    if ((i.types[op] & Imm32)
2392 	    i.types[op] |= smallest_imm_type (i.op[op].imms->X_add_number);
2397 	      i.types[op] &= ~Imm32;
2436 		i.types[op] &= mask;
2450     if (i.types[op] & Disp)
2456 	    if ((i.types[op] & Disp16)
2463 		i.types[op] &= ~Disp64;
2465 	    if ((i.types[op] & Disp32)
2473 		i.types[op] &= ~Disp64;
2475 	    if (!disp && (i.types[op] & BaseIndex))
2477 		i.types[op] &= ~Disp;
2485 		    i.types[op] &= ~Disp64;
2486 		    i.types[op] |= Disp32S;
2489 		  i.types[op] |= Disp32;
2491 	    if ((i.types[op] & (Disp32 | Disp32S | Disp16))
2493 	      i.types[op] |= Disp8;
2500 	    i.types[op] &= ~Disp;
2504 	  i.types[op] &= ~Disp64;
2529   /* If given types r0 and r1 are registers they must be of the same type
2632       overlap0 = i.types[0] & operand_types[0];
2636 	  if (!MATCH (overlap0, i.types[0], operand_types[0]))
2646 	      && i.types [0] == (Acc | Reg32)
2647 	      && i.types [1] == (Acc | Reg32))
2651 	  overlap1 = i.types[1] & operand_types[1];
2652 	  if (!MATCH (overlap0, i.types[0], operand_types[0])
2653 	      || !MATCH (overlap1, i.types[1], operand_types[1])
2660 		   || CONSISTENT_REGISTER_MATCH (overlap0, i.types[0],
2662 						 overlap1, i.types[1],
2670 	      overlap0 = i.types[0] & operand_types[1];
2671 	      overlap1 = i.types[1] & operand_types[0];
2672 	      if (!MATCH (overlap0, i.types[0], operand_types[1])
2673 		  || !MATCH (overlap1, i.types[1], operand_types[0])
2674 		  || !CONSISTENT_REGISTER_MATCH (overlap0, i.types[0],
2676 						 overlap1, i.types[1],
2699 		  overlap3 = i.types[3] & operand_types[3];
2701 		  overlap2 = i.types[2] & operand_types[2];
2708 		  if (!MATCH (overlap3, i.types[3], operand_types[3])
2710 						     i.types[2],
2713 						     i.types[3],
2721 		  if (!MATCH (overlap2, i.types[2], operand_types[2])
2723 						     i.types[1],
2726 						     i.types[2],
2755 	  && ((i.types[0] & JumpAbsolute)
2795   int mem_op = (i.types[0] & AnyMem) ? 0 : 1;
2850 	      if ((i.types[0] & Reg))
2851 		i.suffix = ((i.types[0] & Reg16) ? WORD_MNEM_SUFFIX :
2856 	      if ((i.types[0] & Reg8))
2874 		if ((i.types[op] & Reg)
2877 		    i.suffix = ((i.types[op] & Reg8) ? BYTE_MNEM_SUFFIX :
2878 				(i.types[op] & Reg16) ? WORD_MNEM_SUFFIX :
2879 				(i.types[op] & Reg64) ? QWORD_MNEM_SUFFIX :
3026 	      || i.types [0] != (Acc | Reg64)
3027 	      || i.types [1] != (Acc | Reg64)
3051       if (i.types[op] & Reg8)
3067       if ((i.types[op] & WordReg) && i.op[op].regs->reg_num < 4)
3084 		     (i.op[op].regs + (i.types[op] & Reg16
3094       if (i.types[op] & (Reg | RegMMX | RegXMM
3118     if ((i.types[op] & Reg8) != 0
3130 	     && (i.types[op] & Reg16) != 0
3153     else if ((i.types[op] & Reg64) != 0
3172     if ((i.types[op] & Reg8) != 0
3183     else if (((i.types[op] & Reg16) != 0
3184 	      || (i.types[op] & Reg32) != 0)
3204     if ((i.types[op] & Reg8) != 0
3216 	     && (i.types[op] & Reg32) != 0
3246   overlap0 = i.types[0] & i.tm.operand_types[0];
3278   i.types[0] = overlap0;
3280   overlap1 = i.types[1] & i.tm.operand_types[1];
3313   i.types[1] = overlap1;
3315   overlap2 = i.types[2] & i.tm.operand_types[2];
3317   i.types[2] = overlap2;
3341 		   && i.types[0] == RegXMM);
3354 	   i.types[0] = i.types[1];
3355 	   i.types[1] = i.types[2];
3367 	   unsigned int first_reg_op = (i.types[0] & Reg) ? 0 : 1;
3372 	   i.types[first_reg_op + 1] = i.types[first_reg_op];
3380       if (i.types[0] & (SReg2 | SReg3))
3395 	  unsigned int op = (i.types[0] & (Reg | FloatReg)) ? 0 : 1;
3479 		      && (i.types[0] & ShiftCount)));
3480 	  source = (i.types[0] & (Imm | ShiftCount)) ? 1 : 0;
3486 		  && (i.types[0] & Imm)
3487 		  && (i.types[1] & Imm));
3523 	  if (!((i.types[0] | i.types[1]) & Control))
3537 	    if ((i.types[op] & AnyMem))
3560 		      i.types[op] = ((i.prefix[ADDR_PREFIX] == 0)
3567 		      i.types[op] = Disp16;
3572 		      i.types[op] = Disp32;
3581 		  i.types[op] &= ~Disp;
3583 		    i.types[op] |= Disp32;	/* Must be 32 bit */
3585 		    i.types[op] |= Disp32S;
3594 	      i.types[op] &= ~ Disp;
3595 	      i.types[op] |= Disp32S;
3615 		      if ((i.types[op] & Disp) == 0)
3618 			  i.types[op] |= Disp8;
3628 	      i.rm.mode = mode_from_disp_size (i.types[op]);
3633 		  && (i.types[op] & Disp))
3634 		i.types[op] = ((i.types[op] & Disp8)
3650 		      i.types[op] |= Disp8;
3685 		i.rm.mode = mode_from_disp_size (i.types[op]);
3690 	      /* Fakes a zero displacement assuming that i.types[op]
3713 	    if ((i.types[op] & (Reg | RegMMX | RegXMM
4109   if (i.types[n] & (Disp8 | Disp16 | Disp64))
4112       if (i.types[n] & Disp8)
4114       if (i.types[n] & Disp64)
4126   if (i.types[n] & (Imm8 | Imm8S | Imm16 | Imm64))
4129       if (i.types[n] & (Imm8 | Imm8S))
4131       if (i.types[n] & Imm64)
4145       if (i.types[n] & Disp)
4161 	      int sign = (i.types[n] & Disp32S) != 0;
4165 	      assert ((i.types[n] & Disp8) == 0);
4176 		    if (i.types[n1] & Imm)
4246       if (i.types[n] & Imm)
4268 	      if ((i.types[n] & (Imm32S))
4387 # define lex_got(reloc, adjust, types) NULL
4401 	 unsigned int *types)
4491 	      if (types)
4494 		    *types = Imm32 | Disp32;
4496 		    *types = gotrel[j].types64;
4606   unsigned int types = ~0U;
4624   gotfree_input_line = lex_got (&i.reloc[this_operand], NULL, &types);
4651       i.types[this_operand] |= Imm64;
4681       i.types[this_operand] |= Imm8 | Imm16 | Imm32 | Imm32S | Imm64;
4682       i.types[this_operand] &= types;
4744   unsigned int types = Disp;
4753   if ((i.types[this_operand] & JumpAbsolute)
4788   i.types[this_operand] |= bigdisp;
4802   if ((i.types[this_operand] & BaseIndex) != 0
4841   gotfree_input_line = lex_got (&i.reloc[this_operand], NULL, &types);
4913   if (!(i.types[this_operand] & ~Disp))
4914     i.types[this_operand] &= types;
4952 	  || (i.types[0] & Disp))
5009 	      && (i.types[this_operand] & (Disp16 | Disp32)))
5010 	    i.types[this_operand] ^= (Disp16 | Disp32);
5046       i.types[this_operand] |= JumpAbsolute;
5100 	      i.types[this_operand] |= JumpAbsolute;
5109       i.types[this_operand] |= r->reg_type & ~BaseIndex;
5121       if (i.types[this_operand] & JumpAbsolute)
5193 	      i.types[this_operand] |= BaseIndex;
5293 	  && (i.types[this_operand] & Disp) == 0)
5295 	  i.types[this_operand] = InOutPortReg;
7128 	    i.types[this_operand] |= JumpAbsolute;
7217 	i.types[this_operand] |= JumpAbsolute;
7400 	    i.types[this_operand] |= BaseIndex;
7442 	    i.types[this_operand] |= BaseIndex;
7448 	    i.types[this_operand] |= reg->reg_type & ~BaseIndex;
7565 		i.types[this_operand] |= BaseIndex;