usr.sbin/bhyve/task_switch.c

103 GETREG(struct vmctx *ctx, int vcpu, int reg)
108 	error = vm_get_register(ctx, vcpu, reg, &val);
114 SETREG(struct vmctx *ctx, int vcpu, int reg, uint64_t val)
118 	error = vm_set_register(ctx, vcpu, reg, val);
154 sel_exception(struct vmctx *ctx, int vcpu, int vector, uint16_t sel, int ext)
168 	vm_inject_fault(ctx, vcpu, vector, 1, sel);
176 desc_table_limit_check(struct vmctx *ctx, int vcpu, uint16_t sel)
183 	error = vm_get_desc(ctx, vcpu, reg, &base, &limit, &access);
206 desc_table_rw(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging,
216 	error = vm_get_desc(ctx, vcpu, reg, &base, &limit, &access);
220 	error = vm_copy_setup(ctx, vcpu, paging, base + SEL_START(sel),
227 		vm_copyin(ctx, vcpu, iov, desc, sizeof(*desc));
229 		vm_copyout(ctx, vcpu, desc, iov, sizeof(*desc));
234 desc_table_read(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging,
237 	return (desc_table_rw(ctx, vcpu, paging, sel, desc, true, faultptr));
241 desc_table_write(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging,
244 	return (desc_table_rw(ctx, vcpu, paging, sel, desc, false, faultptr));
255 read_tss_descriptor(struct vmctx *ctx, int vcpu, struct vm_task_switch *ts,
265 	if (desc_table_limit_check(ctx, vcpu, sel)) {
267 			sel_exception(ctx, vcpu, IDT_TS, sel, ts->ext);
269 			sel_exception(ctx, vcpu, IDT_GP, sel, ts->ext);
275 	error = desc_table_read(ctx, vcpu, &sup_paging, sel, desc, faultptr);
311 validate_seg_desc(struct vmctx *ctx, int vcpu, struct vm_task_switch *ts,
343 	sel = GETREG(ctx, vcpu, segment);
347 		sel_exception(ctx, vcpu, IDT_TS, sel, ts->ext);
352 	if (desc_table_limit_check(ctx, vcpu, sel)) {
353 		sel_exception(ctx, vcpu, IDT_TS, sel, ts->ext);
361 			sel_exception(ctx, vcpu, IDT_TS, sel, ts->ext);
373 	error = desc_table_read(ctx, vcpu, &sup_paging, sel, &usd, faultptr);
382 		sel_exception(ctx, vcpu, IDT_TS, sel, ts->ext);
394 		sel_exception(ctx, vcpu, idtvec, sel, ts->ext);
398 	cs = GETREG(ctx, vcpu, VM_REG_GUEST_CS);
404 		sel_exception(ctx, vcpu, IDT_TS, sel, ts->ext);
412 			sel_exception(ctx, vcpu, IDT_TS, sel, ts->ext);
428 			sel_exception(ctx, vcpu, IDT_TS, sel, ts->ext);
437 tss32_save(struct vmctx *ctx, int vcpu, struct vm_task_switch *task_switch,
442 	tss->tss_eax = GETREG(ctx, vcpu, VM_REG_GUEST_RAX);
443 	tss->tss_ecx = GETREG(ctx, vcpu, VM_REG_GUEST_RCX);
444 	tss->tss_edx = GETREG(ctx, vcpu, VM_REG_GUEST_RDX);
445 	tss->tss_ebx = GETREG(ctx, vcpu, VM_REG_GUEST_RBX);
446 	tss->tss_esp = GETREG(ctx, vcpu, VM_REG_GUEST_RSP);
447 	tss->tss_ebp = GETREG(ctx, vcpu, VM_REG_GUEST_RBP);
448 	tss->tss_esi = GETREG(ctx, vcpu, VM_REG_GUEST_RSI);
449 	tss->tss_edi = GETREG(ctx, vcpu, VM_REG_GUEST_RDI);
452 	tss->tss_es = GETREG(ctx, vcpu, VM_REG_GUEST_ES);
453 	tss->tss_cs = GETREG(ctx, vcpu, VM_REG_GUEST_CS);
454 	tss->tss_ss = GETREG(ctx, vcpu, VM_REG_GUEST_SS);
455 	tss->tss_ds = GETREG(ctx, vcpu, VM_REG_GUEST_DS);
456 	tss->tss_fs = GETREG(ctx, vcpu, VM_REG_GUEST_FS);
457 	tss->tss_gs = GETREG(ctx, vcpu, VM_REG_GUEST_GS);
460 	tss->tss_eflags = GETREG(ctx, vcpu, VM_REG_GUEST_RFLAGS);
466 	vm_copyout(ctx, vcpu, tss, iov, sizeof(struct tss32));
470 update_seg_desc(struct vmctx *ctx, int vcpu, int reg, struct seg_desc *sd)
474 	error = vm_set_desc(ctx, vcpu, reg, sd->base, sd->limit, sd->access);
479  * Update the vcpu registers to reflect the state of the new task.
482 tss32_restore(struct vmctx *ctx, int vcpu, struct vm_task_switch *ts,
502 	SETREG(ctx, vcpu, VM_REG_GUEST_LDTR, tss->tss_ldt);
522 					vm_inject_gp(ctx, vcpu);
526 			SETREG(ctx, vcpu, VM_REG_GUEST_PDPTE0, pdpte[0]);
527 			SETREG(ctx, vcpu, VM_REG_GUEST_PDPTE1, pdpte[1]);
528 			SETREG(ctx, vcpu, VM_REG_GUEST_PDPTE2, pdpte[2]);
529 			SETREG(ctx, vcpu, VM_REG_GUEST_PDPTE3, pdpte[3]);
531 		SETREG(ctx, vcpu, VM_REG_GUEST_CR3, tss->tss_cr3);
536 	SETREG(ctx, vcpu, VM_REG_GUEST_RFLAGS, eflags);
537 	SETREG(ctx, vcpu, VM_REG_GUEST_RIP, tss->tss_eip);
540 	SETREG(ctx, vcpu, VM_REG_GUEST_RAX, tss->tss_eax);
541 	SETREG(ctx, vcpu, VM_REG_GUEST_RCX, tss->tss_ecx);
542 	SETREG(ctx, vcpu, VM_REG_GUEST_RDX, tss->tss_edx);
543 	SETREG(ctx, vcpu, VM_REG_GUEST_RBX, tss->tss_ebx);
544 	SETREG(ctx, vcpu, VM_REG_GUEST_RSP, tss->tss_esp);
545 	SETREG(ctx, vcpu, VM_REG_GUEST_RBP, tss->tss_ebp);
546 	SETREG(ctx, vcpu, VM_REG_GUEST_RSI, tss->tss_esi);
547 	SETREG(ctx, vcpu, VM_REG_GUEST_RDI, tss->tss_edi);
550 	SETREG(ctx, vcpu, VM_REG_GUEST_ES, tss->tss_es);
551 	SETREG(ctx, vcpu, VM_REG_GUEST_CS, tss->tss_cs);
552 	SETREG(ctx, vcpu, VM_REG_GUEST_SS, tss->tss_ss);
553 	SETREG(ctx, vcpu, VM_REG_GUEST_DS, tss->tss_ds);
554 	SETREG(ctx, vcpu, VM_REG_GUEST_FS, tss->tss_fs);
555 	SETREG(ctx, vcpu, VM_REG_GUEST_GS, tss->tss_gs);
562 		vm_copyout(ctx, vcpu, tss, iov, sizeof(*tss));
565 	error = validate_seg_desc(ctx, vcpu, ts, VM_REG_GUEST_LDTR, &seg_desc,
569 	update_seg_desc(ctx, vcpu, VM_REG_GUEST_LDTR, &seg_desc);
580 	error = validate_seg_desc(ctx, vcpu, ts, VM_REG_GUEST_CS, &seg_desc,
585 	error = validate_seg_desc(ctx, vcpu, ts, VM_REG_GUEST_SS, &seg_desc2,
589 	update_seg_desc(ctx, vcpu, VM_REG_GUEST_CS, &seg_desc);
590 	update_seg_desc(ctx, vcpu, VM_REG_GUEST_SS, &seg_desc2);
593 	error = validate_seg_desc(ctx, vcpu, ts, VM_REG_GUEST_DS, &seg_desc,
597 	update_seg_desc(ctx, vcpu, VM_REG_GUEST_DS, &seg_desc);
599 	error = validate_seg_desc(ctx, vcpu, ts, VM_REG_GUEST_ES, &seg_desc,
603 	update_seg_desc(ctx, vcpu, VM_REG_GUEST_ES, &seg_desc);
605 	error = validate_seg_desc(ctx, vcpu, ts, VM_REG_GUEST_FS, &seg_desc,
609 	update_seg_desc(ctx, vcpu, VM_REG_GUEST_FS, &seg_desc);
611 	error = validate_seg_desc(ctx, vcpu, ts, VM_REG_GUEST_GS, &seg_desc,
615 	update_seg_desc(ctx, vcpu, VM_REG_GUEST_GS, &seg_desc);
626 push_errcode(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging,
638 	cr0 = GETREG(ctx, vcpu, VM_REG_GUEST_CR0);
639 	rflags = GETREG(ctx, vcpu, VM_REG_GUEST_RFLAGS);
640 	stacksel = GETREG(ctx, vcpu, VM_REG_GUEST_SS);
642 	error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_SS, &seg_desc.base,
666 	esp = GETREG(ctx, vcpu, VM_REG_GUEST_RSP);
671 		sel_exception(ctx, vcpu, IDT_SS, stacksel, 1);
677 		vm_inject_ac(ctx, vcpu, 1);
682 	error = vm_copy_setup(ctx, vcpu, paging, gla, bytes, PROT_WRITE,
687 	vm_copyout(ctx, vcpu, &errcode, iov, bytes);
688 	SETREG(ctx, vcpu, VM_REG_GUEST_RSP, esp);
716 	int error, ext, fault, minlimit, nt_type, ot_type, vcpu;
725 	vcpu = *pvcpu;
744 	error = read_tss_descriptor(ctx, vcpu, task_switch, nt_sel, &nt_desc,
754 		sel_exception(ctx, vcpu, IDT_TS, nt_sel, ext);
760 		sel_exception(ctx, vcpu, IDT_NP, nt_sel, ext);
777 		sel_exception(ctx, vcpu, IDT_TS, nt_sel, ext);
783 		sel_exception(ctx, vcpu, IDT_TS, nt_sel, ext);
792 		sel_exception(ctx, vcpu, IDT_GP, nt_sel, ext);
797 	error = vm_copy_setup(ctx, vcpu, &sup_paging, nt.base, minlimit + 1,
800 	vm_copyin(ctx, vcpu, nt_iov, &newtss, minlimit + 1);
803 	ot_sel = GETREG(ctx, vcpu, VM_REG_GUEST_TR);
811 		sel_exception(ctx, vcpu, IDT_TS, ot_sel, task_switch->ext);
816 	error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_TR, &ot_base, &ot_lim,
824 	error = read_tss_descriptor(ctx, vcpu, task_switch, ot_sel, &ot_desc,
829 	error = vm_copy_setup(ctx, vcpu, &sup_paging, ot_base, minlimit + 1,
832 	vm_copyin(ctx, vcpu, ot_iov, &oldtss, minlimit + 1);
840 		error = desc_table_write(ctx, vcpu, &sup_paging, ot_sel,
851 	tss32_save(ctx, vcpu, task_switch, eip, &oldtss, ot_iov);
859 		error = desc_table_write(ctx, vcpu, &sup_paging, nt_sel,
865 	SETREG(ctx, vcpu, VM_REG_GUEST_TR, nt_sel);
869 	update_seg_desc(ctx, vcpu, VM_REG_GUEST_TR, &nt);
872 	cr0 = GETREG(ctx, vcpu, VM_REG_GUEST_CR0);
873 	SETREG(ctx, vcpu, VM_REG_GUEST_CR0, cr0 | CR0_TS);
880 	error = vm_set_register(ctx, vcpu, VM_REG_GUEST_RIP, newtss.tss_eip);
884 	error = tss32_restore(ctx, vcpu, task_switch, ot_sel, &newtss, nt_iov,
896 		error = push_errcode(ctx, vcpu, &task_switch->paging, nt_type,
928 	 * the IDT then extinguish the pending event from the vcpu's
932 		error = vm_set_intinfo(ctx, vcpu, 0);