Lines Matching refs:intrs
236 dmd = &unit->intrs[idx];
284 dmd = &unit->intrs[idx];
352 dmd = &unit->intrs[i];
438 unit->intrs[i].irq = -1;
440 unit->intrs[DMAR_INTR_FAULT].name = "fault";
441 unit->intrs[DMAR_INTR_FAULT].irq_rid = DMAR_FAULT_IRQ_RID;
442 unit->intrs[DMAR_INTR_FAULT].handler = dmar_fault_intr;
443 unit->intrs[DMAR_INTR_FAULT].msi_data_reg = DMAR_FEDATA_REG;
444 unit->intrs[DMAR_INTR_FAULT].msi_addr_reg = DMAR_FEADDR_REG;
445 unit->intrs[DMAR_INTR_FAULT].msi_uaddr_reg = DMAR_FEUADDR_REG;
446 unit->intrs[DMAR_INTR_FAULT].enable_intr = dmar_enable_fault_intr;
447 unit->intrs[DMAR_INTR_FAULT].disable_intr = dmar_disable_fault_intr;
454 unit->intrs[DMAR_INTR_QI].name = "qi";
455 unit->intrs[DMAR_INTR_QI].irq_rid = DMAR_QI_IRQ_RID;
456 unit->intrs[DMAR_INTR_QI].handler = dmar_qi_intr;
457 unit->intrs[DMAR_INTR_QI].msi_data_reg = DMAR_IEDATA_REG;
458 unit->intrs[DMAR_INTR_QI].msi_addr_reg = DMAR_IEADDR_REG;
459 unit->intrs[DMAR_INTR_QI].msi_uaddr_reg = DMAR_IEUADDR_REG;
460 unit->intrs[DMAR_INTR_QI].enable_intr = dmar_enable_qi_intr;
461 unit->intrs[DMAR_INTR_QI].disable_intr = dmar_disable_qi_intr;