Lines Matching refs:l0
71 setx TD_V | TD_L, %l1, %l0
78 and %l6, %l0, %l1
79 cmp %l0, %l1
85 srlx %l5, TAR_VPN_SHIFT, %l0
86 sllx %l0, TAR_VPN_SHIFT, %l0
87 or %l0, TLB_DEMAP_PRIMARY | TLB_DEMAP_PAGE, %l0
88 stxa %g0, [%l0] ASI_IMMU_DEMAP
97 setx TD_V, %l1, %l0
104 and %l1, %l0, %l1
105 cmp %l0, %l1
138 mov (1 << TLB_DAR_SLOT_SHIFT), %l0
144 5: ldxa [%l0] ASI_ITLB_DATA_ACCESS_REG, %g0
145 ldxa [%l0] ASI_ITLB_DATA_ACCESS_REG, %o1
149 add %l0, (1 << TLB_DAR_SLOT_SHIFT), %l0
152 stxa %l5, [%l0] ASI_ITLB_DATA_ACCESS_REG
157 6: sethi %hi(KERNBASE), %l0
160 flush %l0
186 SET(cpu_start_args, %l1, %l0)
190 stw %l1, [%l0 + CSA_STATE]
192 1: ldx [%l0 + CSA_TICK], %l1
198 stx %l1, [%l0 + CSA_VER]
214 stw %l2, [%l0 + CSA_STATE]
216 3: ldx [%l0 + CSA_STICK], %l2
229 stw %l1, [%l0 + CSA_STATE]
234 5: lduw [%l0 + CSA_MID], %l1
239 add %l0, CSA_TTES, %l1
267 ldx [%l0 + CSA_PCPU], %l1